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A review on reversible quantum adders
Journal of Network and Computer Applications, 2020Reversible adders are essential circuits in quantum computing systems. They are a fundamental part of the algorithms implemented for such systems, where Shor's celebrated factoring algorithm is one of the most prominent examples in which reversible ...
Francisco José Orts Gómez +3 more
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International Conference on Computing Communication and Networking Technologies, 2020
Major operation block in any processing unit is a multiplier. There are many multiplication algorithms are proposed, by using which multiplier structure can be designed.
Y. Ykuntam, Katta Pavani, Krishna Saladi
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Major operation block in any processing unit is a multiplier. There are many multiplication algorithms are proposed, by using which multiplier structure can be designed.
Y. Ykuntam, Katta Pavani, Krishna Saladi
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Process variation-aware approximate full adders for imprecision-tolerant applications
Computers & electrical engineering, 2020In imprecision-tolerant applications such as multimedia and signal processing a slightly degraded output quality is acceptable, which could lead to significant power reduction. We have proposed three approximate full adders for such applications. We have
M. Mirzaei, S. Mohammadi
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International Journal of Theoretical Physics, 2019
zbMATH Open Web Interface contents unavailable due to conflicting licenses.
Asma Taheri Monfared +2 more
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zbMATH Open Web Interface contents unavailable due to conflicting licenses.
Asma Taheri Monfared +2 more
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Efficient modular hybrid adders and Radix-4 booth multipliers for DSP applications
Microelectronics Journal, 2020Adders and multipliers are the fundamental elements of a signal processing architecture. Improve the speed of addition and multiplication operations while minimizing power consumption and area is the problem of interest of this paper.
Pramod Patali, S. Kassim
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IBM Journal of Research and Development, 1958
Summary: It is widely known that a computer adder can be checked by a completely independent circuit using check symbols that are residues of the numbers modulo some base. This paper describes such a residue checking system and shows, moreover, that independent adding and checking circuits are possible only with systems of this type.
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Summary: It is widely known that a computer adder can be checked by a completely independent circuit using check symbols that are residues of the numbers modulo some base. This paper describes such a residue checking system and shows, moreover, that independent adding and checking circuits are possible only with systems of this type.
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Proceedings of the IEEE, 1985
A prototype for a binary adder, in which the carry propagation is handled by light signals is suggested, thus enabling a fast execution of addition operation even for large operands.
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A prototype for a binary adder, in which the carry propagation is handled by light signals is suggested, thus enabling a fast execution of addition operation even for large operands.
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Proceedings 15th IEEE Symposium on Computer Arithmetic. ARITH-15 2001, 2002
Binary carry-propagating addition can be efficiently expressed as a prefix computation. Several examples of adders based on such a formulation have been published and efficient implementations are numerous. Chief among the known constructions are those of Kogge and Stone (1973) and Ladner and Fischer (1980).
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Binary carry-propagating addition can be efficiently expressed as a prefix computation. Several examples of adders based on such a formulation have been published and efficient implementations are numerous. Chief among the known constructions are those of Kogge and Stone (1973) and Ladner and Fischer (1980).
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IEEE Transactions on Circuits and Systems Part 1: Regular Papers, 2019
This paper proposes a new design methodology to explore the state-of-the-art approximate adders for accelerator architectures conceived in the realm of multiplier-less multiple constant multiplication optimization problem.
L. Soares +4 more
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This paper proposes a new design methodology to explore the state-of-the-art approximate adders for accelerator architectures conceived in the realm of multiplier-less multiple constant multiplication optimization problem.
L. Soares +4 more
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Robust QCA full‐adders using an efficient fault‐tolerant five‐input majority gate
International journal of circuit theory and applications, 2019Quantum‐dot cellular automata (QCA) is considered as a top candidate for nanoscale technologies with unique features such as very low occupancy and ultralow power consumption.
Seyed-Sajad Ahmadpour +2 more
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