Results 61 to 70 of about 84,601 (236)

A design methodology to enable sampling PLLs to synthesise fractional-N frequencies [PDF]

, 2011
A novel design methodology is proposed to enable sampling phase-locked loops (SPLL) to synthesise fractional-N frequencies. To date, SPLL can only generate integer-N frequencies.
Condon, Marissa, Linigyong, Shen, Xu, Tao   +2 more
core  

Phase Locked-Loop Design of High-Order Automotive Frequency Modulated Continuous Wave Radar Based on Fast Integration Structure

IEEE Access
In recent years, frequency-modulated continuous-wave (FMCW) radars have been widely used in the automotive field to measure the relative distance and speed of external targets.
Mengwei Yang, Jinyou Chen, Changhong Shan   +2 more
doaj   +1 more source

Optimal space communications techniques Status report, 16 Dec. 1969 - 15 Mar. 1970 [PDF]

All digital phase locked loop FM demodulator, and optimum adaptive delta modulator designed for improving space ...
Schilling, D. L.
core   +1 more source

Time-Domain ADPLL BPSK, QPSK, and 8PSK Demodulators

Journal of Electrical and Computer Engineering
Time-domain all-digital-phase-locked-loop phase-shift-keying (PSK) demodulators are proposed for BPSK, QPSK, and 8PSK signals. The demodulator architectures are highly suitable for low-voltage nanoscale CMOS techology.
Phanumas Khumsat, Thanabodee Koyphol, Tan Thongruk, Tidarat Inyod   +3 more
doaj   +1 more source

A Second Harmonic Current Suppression Strategy Based on a Digital Band-Stop Filter With Center Frequency Tracking Grid Frequency

IEEE Access
In a single-phase grid-tie system, the presence of a second harmonic current (SHC) on the DC side reduces the conversion efficiency and lifetime of the DC source.
Jun-Hyeong Kwon, Guangxu Zhou, Chun-Sung Kim, Sung-Jun Park, Yipei Wang   +4 more
doaj   +1 more source

Processing circuit with asymmetry corrector and convolutional encoder for digital data [PDF]

, 1987
A processing circuit is provided for correcting for input parameter variations, such as data and clock signal symmetry, phase offset and jitter, noise and signal amplitude, in incoming data signals.
Pfiffner, Harold J.
core   +1 more source

An Interpolated Flying-Adder-Based Frequency Synthesizer

Journal of Electrical and Computer Engineering, 2011
This work presents an interpolated flying-adder- (FA-) based frequency synthesizer. The architecture of an interpolated FA, which uses an interpolated multiplexer (MUX) to replace the multiplexer in conventional flying adder, improves the cycle-to-cycle ...
Pao-Lung Chen, Chun-Chien Tsai
doaj   +1 more source

Linear phase demodulator including a phase locked loop with auxiliary feedback loop [PDF]

, 1976
A phase modulated wave that may have no carrier power is demodulated by a phase locked loop including a phase detector for deriving an A.C. data output signal having a magnitude and a phase indicative of the phase of the modulated wave.
Rippy, R. R.
core   +1 more source

Design and Verification of a Digital Controller for a 2-Piece Hemispherical Resonator Gyroscope

Sensors, 2016
A Hemispherical Resonator Gyro (HRG) is the Coriolis Vibratory Gyro (CVG) that measures rotation angle or angular velocity using Coriolis force acting the vibrating mass.
Jungshin Lee, Sung Wook Yun, Jaewook Rhim   +2 more
doaj   +1 more source

Digital receiver study and implementation [PDF]

Computer software was developed which makes it possible to use any general purpose computer with A/D conversion capability as a PSK receiver for low data rate telemetry processing.
Fogle, D. A., Lee, G. M., Massey, J. C.
core   +1 more source