Results 81 to 90 of about 6,822 (302)

Assessing Mesoscale Heterogeneities in Hard Carbon Electrodes Through Deep Learning‐Assisted FIB‐SEM Characterization, Manufacturing and Electrochemical Modeling

open access: yesAdvanced Energy Materials, EarlyView.
A combination of discrete and finite element method models for the current collector deformation and electrochemical performance analysis, respectively. The models are calibrated and validated with electrochemical and imaging data of hard carbon electrodes. These electrodes were manufactured with different parameters (slurry solid contents of 35 and 40
Soorya Saravanan   +12 more
wiley   +1 more source

Digital controlled oscillator (DCO) for all digital phase-locked loop (ADPLL) – a review [PDF]

open access: yes, 2019
Digital controlled oscillator (DCO) is becoming an attractive replacement over the voltage control oscillator (VCO) with the advances of digital intensive research on all-digital phase locked-loop (ADPLL) in complementary metal-oxide semiconductor (CMOS)
Reaz, Mamun Ibne   +10 more
core   +1 more source

Modified Costas Loop for Carrier Phase Tracking in GPS Receivers [PDF]

open access: yesRadioengineering
The carrier phase received at the receivers of the Global Positioning System (GPS) links is used to detect navigation data and to precisely determine the position, speed and time corresponding to the user's equipment.
A. M. Pereira de Lucena   +1 more
doaj  

Smart Exploration of Perovskite Photovoltaics: From AI Driven Discovery to Autonomous Laboratories

open access: yesAdvanced Energy Materials, EarlyView.
In this review, we summarize the fundamentals of AI in automated materials science, and review AI applications in perovskite solar cells. Then, we sum up recent progress in AI‐guided manufacturing optimization, and highlight AI‐driven high‐throughput and autonomous laboratories.
Wenning Chen   +4 more
wiley   +1 more source

A digital loop filter for an all-digital phase-locked loop

open access: yes, 2017
The digital loop filter for an all-digital phase-locked loop was designed to meet a given set of specifications, and the performance of the filter was verified using MATLAB simulations.
Akhil A. Gavankar
core  

A Low Power All-Digital PLL With −40dBc In-Band Fractional Spur Suppression for NB-IoT Applications

open access: yesIEEE Access, 2019
This paper proposes a low-power fractional-N all-digital PLL (ADPLL) for the narrow-band Internet-of-Things applications. Multi-step lock controlling and oscillator tuning word coarse prediction algorithms help to accelerate the locking process to less ...
Na Yan   +6 more
doaj   +1 more source

Assessing Photovoltaic Recycling Capacities and Policy Gaps in the European Union

open access: yesAdvanced Energy and Sustainability Research, EarlyView.
This study maps photovoltaic recycling capacity in the EU and key global regions, highlighting gaps between growing waste volumes and available infrastructure. It combines survey insights and policy analysis to identify recycling bottlenecks and offers recommendations to boost circularity in the solar sector.
Nieves Espinosa   +3 more
wiley   +1 more source

Mapping the Innovation DNA of Agribusiness Firms: A Multi‐Method Analysis of Strategic Capabilities and Performance

open access: yesAgribusiness, EarlyView.
ABSTRACT Innovation is essential for competitiveness in agribusiness facing dynamic environments. This study examines how market orientation, marketing, relational, and social capabilities influence innovation performance. Using data from 751 Spanish firms and a multi‐method approach that integrates Structural Equation Modeling (PLS‐SEM), Necessary ...
Beatriz Corchuelo Martínez‐Azúa   +1 more
wiley   +1 more source

Design of a Time-to-Digital Converter for an All-Digital Phase Locked Loop for the 2-GHz Band

open access: yes, 2013
An all-digital phase locked loop for WiGig systems was implemented. The developedall-digital phase locked loop has a targeted frequency range of 2.1-GHz to2.5-GHz.
Radhakrishnan, Balamurali, Wali, Naveen
core  

Design and Emulation of All-Digital Phase-Locked Loop on FPGA

open access: yes, 2019
This paper demonstrates the design and implementation of an all-digital phase-locked loop (ADPLL) on Field Programmable Gate Array (FPGA). It is useful as an emulation technique to show the feasibility and effectiveness of the ADPLL in the early design ...
Saichandrateja Radhapuram   +2 more
core   +1 more source

Home - About - Disclaimer - Privacy