Results 91 to 100 of about 6,822 (302)
An ADPLL-Based GFSK Modulator with Two-Point Modulation for IoT Applications
To establish ubiquitous and energy-efficient wireless sensor networks (WSNs), short-range Internet of Things (IoT) devices require Bluetooth low energy (BLE) technology, which functions at 2.4 GHz. This study presents a novel approach as follows: a fully
Nam-Seog Kim
doaj +1 more source
The Necessity of Dynamic Workflow Managers for Advancing Self‐Driving Labs and Optimizers
We assess the maturity and integration readiness of key methodologies for Materials Acceleration Platforms, highlighting the need for dynamic workflow managers. Demonstrating this, we integrate PerQueue into a color‐mixing robot, showing how flexible orchestration improves coordination and optimization.
Simon K. Steensen +6 more
wiley +1 more source
Design and Implementation of an All Digital Phase Lock Loop
In this Thesis, we have presented the design of an all-digital phase-locked loop (ADPLL), which consists of a digitally controlled oscillator (DCO), a phase frequency detector (PFD), a control unit and some auxiliary logic circuits.
Tsai, Sheng-Chung, 蔡勝中
core
This paper proposes a low-power design method and a low-noise phase offset calibration technique for a gated ring-oscillator time-to-digital converter (GRO-TDC), which normally consumes a large percentage of most all-digital phase-locked loop (ADPLL ...
Kyoung-Ub Cho +9 more
doaj +1 more source
Evolution of Physical Intelligence Across Scales
By following the evolution of physical intelligence across scales, this article shows how intelligence arises from materials, structures, physical interactions, and collectives. It establishes physical intelligence as the evolutionary foundation upon which embodied intelligence is built.
Ke Liu +7 more
wiley +1 more source
Design and Application of All-Digital Delay-Locked Loop and All-Digital Phase-Locked Loop
本論文描述以數位方式實現與應用類比延遲鎖定迴路與鎖相迴路。和類比延遲鎖定迴路與鎖相迴路比較,全數位延遲鎖定迴路與鎖相迴路具有容易做製程轉移,節省被動元件組成的濾波器,以及快速鎖定的優點。因此以數位方式實踐類比電路近期比較受到歡迎,像是延遲鎖定迴路,鎖相迴路,資料時脈回復電路以及頻率合成器。 本論文包含四個電路:全數位的延遲鎖定迴路,鎖相迴路,資料時脈回復電路以及頻率合成器。首先,提出一個可調整工作週期的全數位的延遲鎖定迴路。利用對輸入週期作時間到數位的轉換結果,輸出時脈的相位與工作週期可以被快速校正 ...
王佑仁, Wang, You-Jen
core
Parametric Analysis of Spiking Neurons in 16 nm Fin Field‐Effect Transistor Technology
Energy efficient computing has driven a shift toward brain‐inspired neuromorphic hardware. This study explores the design of three distinct silicon neuron topologies implemented in 16 nm fin field‐Effect transistor technology. While the Axon‐Hillock design achieves gigahertz throughput, its functional fragility persists. The Morris–Lecar model captures
Logan Larsh +3 more
wiley +1 more source
FPGA-based digital phase-locked loop analysis and implementation
The thesis presents a digital PLL project that will be used as an ECE 463 lab module and serve as a platform for future communication research projects. Field Programmable Gate Array (FPGA) technology is used for all digital signal processing tasks.
Hu, Dan
core
ABSTRACT The rapid evolution of the Internet of Things (IoT) has significantly advanced the field of electrocardiogram (ECG) monitoring, enabling real‐time, remote, and patient‐centric cardiac care. This paper presents a comprehensive survey of AI assisted IoT‐based ECG monitoring systems, focusing on the integration of emerging technologies such as ...
Amrita Choudhury +2 more
wiley +1 more source
The design of an all-digital phase-locked loop with small DCO hardware and fast phase lock [PDF]
The cores of the all-digital phase-locked loop (ADPLL) are the switch-tuning digital control oscillator (DCO) and the architecture. In this brief, we propose a DCO with reduced hardware cost, and architecture with characteristics of fast frequency ...
江正雄; Chiang, Jen-shiun; Chen, Kuang-yuan
core +1 more source

