Results 201 to 210 of about 50,418 (238)
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2011 Proceedings of the ESSCIRC (ESSCIRC), 2011
An analog baseband chain together with an analog to digital converter (ADC) for a Synthetic Aperture Radar (SAR) receiver implemented in 130nm CMOS technology is presented in this paper. The baseband and the ADC are integrated on a single chip, occupying 1.6mm2 (I and Q branch) of active silicon area. The baseband is selectable between 50MHz and 160MHz
Faizah Abu Bakar +5 more
openaire +4 more sources
An analog baseband chain together with an analog to digital converter (ADC) for a Synthetic Aperture Radar (SAR) receiver implemented in 130nm CMOS technology is presented in this paper. The baseband and the ADC are integrated on a single chip, occupying 1.6mm2 (I and Q branch) of active silicon area. The baseband is selectable between 50MHz and 160MHz
Faizah Abu Bakar +5 more
openaire +4 more sources
GaAs Sigma-Delta Modulator Modeling for Analog to Digital Converters (ADCS)
1992Abstract : In this project, a sigma-delta modulator has been designed. The circuit was designed and simulated using model parameters corresponding to the Vitesse 1.2 micron GaAs MESFET technology. The clock rate of the circuit is 512- Mhz and preliminary results show that it can be used for a 9-10 bit A/D converter accepting a 4-Mhz input signal.
Ray Siford, Eric Mahurin
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Analog Integrated Circuits and Signal Processing, 2018
In this paper a methodology to develop PSpice (SPICE) model for flash type analog to digital converters and its validation is presented. With the onset of the Internet of Things and ongoing digitization of electronic devices around us, almost every device needs an interface or controlling unit as a digital computing device.
Tanuj Chauhan +3 more
openaire +1 more source
In this paper a methodology to develop PSpice (SPICE) model for flash type analog to digital converters and its validation is presented. With the onset of the Internet of Things and ongoing digitization of electronic devices around us, almost every device needs an interface or controlling unit as a digital computing device.
Tanuj Chauhan +3 more
openaire +1 more source
Analog Integrated Circuits and Signal Processing, 2003
The reliability of ADCs used in highly critical systems can be increased by applying a two-step procedure starting with sensitivity analysis followed by redesign. The sensitivity analysis is used to identify the most sensitive blocks which could then be redesigned for better reliability by incorporating fault tolerance. This paper illustrates the steps
Mandeep Singh, Israel Koren
openaire +1 more source
The reliability of ADCs used in highly critical systems can be increased by applying a two-step procedure starting with sensitivity analysis followed by redesign. The sensitivity analysis is used to identify the most sensitive blocks which could then be redesigned for better reliability by incorporating fault tolerance. This paper illustrates the steps
Mandeep Singh, Israel Koren
openaire +1 more source
Properties and Use of Digital-to-Analog (DAC) and Analog-to-Digital (ADC) Converters
1975Most laboratory instruments either produce or accept analog or continuous signals of some form. In order for a digital computer to be able to communicate with an analog instrument, digital-analog interconversions must be made. There are several different ways to construct devices to accomplish this.
Charles L. Wilkins +4 more
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Analog Integrated Circuits and Signal Processing, 2002
Excess loop delay in a continuous-time switched-current ΣΔ modulator causes a stability problem and degrades the modulator's dynamic range. This paper presents a simple and effective way to reduce the loop delay and improve the modulator's performance. The loop delay of the ADC is reduced by feeding the “predicted next state” to the comparator.
Louis Luh, John Choma, Jeffrey Draper
openaire +1 more source
Excess loop delay in a continuous-time switched-current ΣΔ modulator causes a stability problem and degrades the modulator's dynamic range. This paper presents a simple and effective way to reduce the loop delay and improve the modulator's performance. The loop delay of the ADC is reduced by feeding the “predicted next state” to the comparator.
Louis Luh, John Choma, Jeffrey Draper
openaire +1 more source
0.18um low voltage 12-bit successive-approximation-register analog-to-digital converter (SAR ADC)
2011 3rd Asia Symposium on Quality Electronic Design (ASQED), 2011This paper presents a 0.18um process Successive-Approximation Register Analog-to-Digital Converter (SAR ADC) design that can operate at a low voltage of minimum 1.4V across process corners and temperature with the power consumption of less than 100uW. The design comprises three main blocks namely a fully differential latched comparator, binary-weighted
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IEEE Transactions on Vehicular Technology, 2005
The software radio concept is a topic of widespread interest in wireless cellular systems. Due to the high sampling ratio and quantization requirements, the ADC (analog-to-digital converter) is as key component of any software radio architecture. In this paper we present an analytical tool for evaluating the quantization requirements within the ADC ...
T. Araujo, null Rui Dinis
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The software radio concept is a topic of widespread interest in wireless cellular systems. Due to the high sampling ratio and quantization requirements, the ADC (analog-to-digital converter) is as key component of any software radio architecture. In this paper we present an analytical tool for evaluating the quantization requirements within the ADC ...
T. Araujo, null Rui Dinis
openaire +1 more source
2019
By applying information theoretic concepts to analog-to-digital convertor (ADC) design, we have created a mathematical framework from which the fundamental limit for the resolution-bandwidth product of any ADC may be derived. We found the surprising result that the limiting resolution of any ADC is proportional to oversampling-ratio (OSR), as opposed ...
Zeljko Ignjatovic, Yiqiao Zhang
openaire +1 more source
By applying information theoretic concepts to analog-to-digital convertor (ADC) design, we have created a mathematical framework from which the fundamental limit for the resolution-bandwidth product of any ADC may be derived. We found the surprising result that the limiting resolution of any ADC is proportional to oversampling-ratio (OSR), as opposed ...
Zeljko Ignjatovic, Yiqiao Zhang
openaire +1 more source
2013
Electronics used in medical applications attract lots of researches on it, consequently more patients will be treated and have a healthy life. The analog-to-digital converter (ADC) is the inter-connection between the analog and digital part of a device, plays an important role transferring signals in real life to signals in digital domain.
Phan Vo Kim Anh, Hoang Trang
openaire +1 more source
Electronics used in medical applications attract lots of researches on it, consequently more patients will be treated and have a healthy life. The analog-to-digital converter (ADC) is the inter-connection between the analog and digital part of a device, plays an important role transferring signals in real life to signals in digital domain.
Phan Vo Kim Anh, Hoang Trang
openaire +1 more source