Results 11 to 20 of about 146,240 (250)
A High speed data link optimization for digitalized transfer to processing FPGA [PDF]
EPJ Web of Conferences, 2021 State-of-the-art arrays of detectors, that require digital processing, may have a sizeable number of digitalized signal links. This is the case in several experimental nuclear physics instruments.
Collado J., Gonzalez V., Gadea A.
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Exact and heuristic allocation of multi-kernel applications to multi-FPGA platforms [PDF]
, 2019 FPGA-based accelerators demonstrated high energy efficiency compared to GPUs and CPUs. However, single FPGA designs may not achieve sufficient task parallelism.
Casu, Mario R. +4 more
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FMCW rail-mounted SAR: Porting spotlight SAR imaging from MATLAB to FPGA [PDF]
, 2014 In this work, a low-cost laptop-based radar platform derived from the MIT open courseware has been implemented. It can perform ranging, Doppler measurement and SAR imaging using MATLAB as the processor.
Gray, D., Le Kernec, J., Melnikov, A.
core +1 more source
An FPGA-based real-time event sampler [PDF]
, 2010 This paper presents the design and FPGA-implementation of a sampler that is suited for sampling real-time events in embedded systems. Such sampling is useful, for example, to test whether real-time events are handled in time on such systems. By designing
De Sutter, Bjorn +3 more
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Design of FPGA online loading based on Flash controller
Dianzi Jishu Yingyong, 2019 Traditional way of FPGA configuration file update is using development tools to write FPGA target code to storage devices such as Nor Flash through the JTAG way.However,when the system becomes complicated with multiple FPGA,it takes a long time to update
Lin Tianjing, Ruan Xiang, Liu Chun
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IET Circuits, Devices and Systems, 2021 This paper proposes an efficient high‐order finite impulse response (FIR) filter structure for field programmable gate array (FPGA)‐based applications with simultaneous digital signal processing (DSP) and look‐up‐table (LUT) reduced utilization. The real‐
Mountassar Maamoun +6 more
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An Efficient High Speed AES Implementation Using Traditional FPGA and LabVIEW FPGA Platforms [PDF]
2018 International Conference on Cyber-Enabled Distributed Computing and Knowledge Discovery (CyberC), 2018 The LabVIEW FPGA platform is based on graphical programming approach, which makes easy the FPGA programming and the I/O interfacing. The LabVIEW FPGA significantly improves the design productivity and helps to reduce the time to market. On the other hand, traditional FPGA platform is helpful to get an efficient/optimized design by providing control ...
Rao, Muzaffar +4 more
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Predictive control using an FPGA with application to aircraft control [PDF]
, 2013 Alternative and more efficient computational methods can extend the applicability of MPC to systems with tight real-time requirements. This paper presents a “system-on-a-chip” MPC system, implemented on a field programmable gate array (FPGA), consisting ...
Constantinides, GA +5 more
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PGA HPC Implementation of Microtubule Brownian Dynamics Simulations
Труды Института системного программирования РАН, 2018 This paper presents high performance simulation of microtubule molecular dynamics implemented on Xilinx Virtex-7 FPGA using high level synthesis tool Vivado HLS.
Y. A. Rumyanstev +6 more
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Method of QoS evaluation of FPGA as a service
Радіоелектронні і комп'ютерні системи, 2022 The subject of study in this article is the evaluation of the performance issues of cloud services implemented using FPGA technology. The goal is to improve the performance of cloud services built on top of multiple FPGA platforms known as FPGA-as-a ...
Artem Perepelitsyn +2 more
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