Efficient architectures and power modelling of multiresolution analysis algorithms on FPGA [PDF]
This thesis was submitted for the degree of Doctor of Philosophy and awarded by Brunel University.In the past two decades, there has been huge amount of interest in Multiresolution Analysis Algorithms (MAAs) and their applications.
Sazish, Abdul Naser
core +7 more sources
Managing a reconfigurable processor in a general purpose workstation environment [PDF]
Reconfigurable processor hybrids are becoming an accepted solution in the embedded systems domain, but have yet to gain acceptance in the general purpose workstation domain.
Dales, M.
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Hardware Acceleration of Stochastic Neural Networks Enabled by Bit-Cell Level Co-Design of Magnetic Tunnel Junctions. [PDF]
An MTJ‐based probabilistic processing‐in‐memory architecture unites nonvolatile storage, local entropy generation, and stochastic computation within each memory cell. Stored multi‐bit weights are converted directly into programmable stochastic bitstreams, enabling neural‐network inference, adaptive Ising optimization, and uncertainty‐aware Bayesian ...
Wang Q +6 more
europepmc +2 more sources
Efficient FPGA implementation and power modelling of image and signal processing IP cores [PDF]
This thesis was submitted for the degree of Doctor of Philosophy and awarded by Brunel University.Field Programmable Gate Arrays (FPGAs) are the technology of choice in a number ofimage and signal processing application areas such as consumer ...
Chandrasekaran, Shrutisagar
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REFRESH FPGAs: Sustainable FPGA Chiplet Architectures
There is a growing call for greater amounts of increasingly agile computational power for edge and cloud infrastructure to serve the computationally complex needs of ubiquitous computing devices. Thus, an important challenge is addressing the holistic environmental impacts of these next-generation computing systems.
Peipei Zhou 0001 +8 more
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Secure acceleration on cloud-based FPGAs -- FPGA enclaves [PDF]
FPGAs are becoming a common sight in cloud environments and new usage paradigms, such as FPGA-as-a-Service, have emerged. This development poses a challenge to traditional FPGA security models, as these are assuming trust between the user and the hardware owner.
Niklas Lindskog, Håkan Englund
openaire +1 more source
DP‐FPGA: An FPGA Architecture Optimized for Datapaths [PDF]
This paper presents a new Field‐Programmable Gate Array (FPGA) architecture which reduces the density gap between FPGAs and Mask‐Programmed Gate Arrays (MPGAs) for datapath oriented circuits. This is primarily achieved by operating on data as a number of identically programmed four‐bit slices.
Cherepacha, Don, Lewis, David
openaire +3 more sources
Effects of FPGA architecture on FPGA routing [PDF]
Although many traditional Mask Programmed Gate Array (MPGA) algorithms can be applied to FPGA routing, FPGA architectures impose critical constraints and provide alternative views of the routing problem that allow innovative new algorithms to be applied.
openaire +1 more source
A framework for FPGA functional units in high performance computing [PDF]
FPGAs make it practical to speed up a program by defining hardware functional units that perform calculations faster than can be achieved in software. Specialised digital circuits avoid the overhead of executing sequences of instructions, and they make
O'Donnell, J.T. +3 more
core +1 more source
A High speed data link optimization for digitalized transfer to processing FPGA [PDF]
State-of-the-art arrays of detectors, that require digital processing, may have a sizeable number of digitalized signal links. This is the case in several experimental nuclear physics instruments.
Collado J., Gonzalez V., Gadea A.
doaj +1 more source

