Results 201 to 210 of about 146,240 (250)

FPGA Architecture: Principles and Progression

IEEE Circuits and Systems Magazine, 2021
Since their inception more than thirty years ago, field-programmable gate arrays (FPGAs) have been widely used to implement a myriad of applications from different domains. As a result of their low-level hardware reconfigurability, FPGAs have much faster design cycles and lower development costs compared to custom-designed chips.
Andrew Boutros, Vaughn Betz
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FPGAs and HPC

2007
Abstract : This report addresses the current uses of field programmable gate arrays (FPGAs) and their potential for use in high performance computing (HPC). FPGAs are devices programmed using languages and methodologies originally developed for describing the circuit layouts used in today's integrated circuits.
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Evaluating FPGAs: capacity and utilization

Proceedings of Phoenix Conference on Computers and Communications, 2002
The authors present the experimental results of a study on the effective capacity of a set of field programmable gate array (FPGA) devices and the influence of different circuit types on their utilization. A practical mix of benchmark circuits were used with several different FPGAs.
B. Small, A. Bodmer, S. Mourad
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Dynamic and Partial FPGA Exploitation

Proceedings of the IEEE, 2007
Today's field programmable gate array (FPGA) architectures, like Xilinx's Virtex-II series, enable partial and dynamic run-time self-reconfiguration. This feature allows the substitution of parts of a hardware design implemented on this reconfigurable hardware, and therefore, a system can be adapted to the actual demands of applications running on the ...
Becker, J., Huebner, M., Hettich, G., Constapel, R., Eisenmann, J., Luka, J.   +5 more
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ASIC and FPGA Synthesis

2018
The chapter discusses the synthesis for the ASIC and FPGA. During the ASIC prototyping, FPGAs are used and how the ASIC designs can be migrated to FPGA which is discussed in this chapter. The chapter focuses on the important RTL design concepts design portioning, block-level and chip-level synthesis to start with. The design constraints used during the
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FPGAs at 65NM and Beyond - Powerful New FPGAs Bring New Challenges

2006 International Conference on Field Programmable Logic and Applications, 2006
Summary form only given. FPGAs fabrics have become much more complex, including a range of hard IP for memory, DSP and I/O functions. FPGAs have also become much larger, supporting much larger designs and a need to raise the design abstraction level. DSM effects are threatening the FPGA abstraction in which these effects are hidden from the designer by
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FPNA: INTERACTION BETWEEN FPGA AND NEURAL COMPUTATION

International Journal of Neural Systems, 2000
Neural networks are usually considered as naturally parallel computing models. But the number of operators and the complex connection graph of standard neural models can not be directly handled by digital hardware devices. More particularly, several works show that programmable digital hardware is a real opportunity for flexible hardware ...
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Open-source and FPGAs

Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2023
Dana How, Tim Ansell, Vaughn Betz, Chris Lavin, Ted Speers, Pierre-Emmanuel Gaillardon   +5 more
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Application Experiments: MPPA and FPGA

2009 17th IEEE Symposium on Field Programmable Custom Computing Machines, 2009
This paper describes the mapping approach, programmability, and performance of the Ambric Massively Parallel Processor Array (MPPA), and compares these aspects to an FPGA. Two application kernels, a trellis decoder, and n-gram frequency counter, were ported to the Ambric development system and an Altera Stratix II.
Philip Top, Maya Gokhale
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FPGA Architecture and Design Flow

2021
Programmable logic devices are used to realize the complex logic. Due to programmable features, the modern high-density FPGAs are used to prototype the complex ASICs and SOCs. This chapter discusses about the FPGA architecture, design flow, and the simulation using the FPGA.
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