Electrically Doped PNPN Tunnel Field-Effect Transistor Using Dual-Material Polarity Gate with Improved DC and Analog/RF Performance. [PDF]
Shan C +5 more
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Ternary Logic Design Based on Novel Tunneling-Drift-Diffusion Field-Effect Transistors. [PDF]
Lu B +7 more
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A novel observation of negative differential resistance in a standard CMOS transistor and its application to a compact frequency doubler. [PDF]
Kwak B +12 more
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A technique to reduce the probability of band-to-band tunneling for eliminating injected minority carriers in nano scale field-effect diode. [PDF]
Rezaei A, Orouji AA.
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Design of a gate-all-around arch-shaped tunnel-field-effect-transistor-based capacitorless DRAM. [PDF]
Bae SJ +9 more
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Energy-efficient neuromorphic system using novel tunnel FET based LIF neuron design for adaptable threshold logic and image analysis applications. [PDF]
Bashir F +3 more
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Direct investigation of localized leakage currents in GaN-on-sapphire pn-diodes. [PDF]
Kinstler AD +9 more
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Scaling, Leakage Current Suppression, and Simulation of Carbon Nanotube Field-Effect Transistors. [PDF]
Gong W +7 more
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Design and Study of a Novel P-Type Junctionless FET for High Performance of CMOS Inverter. [PDF]
Wang B +5 more
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Simulation-Based Performance Assessment of Bulk Junctionless FET with Asymmetric Source/Drain for Ultrasensitive Detection of Biomolecules. [PDF]
Son J, Meyyappan M, Kim K.
europepmc +1 more source

