Results 1 to 10 of about 300 (156)

Self-Adaption of the GIDL Erase Promotes Stacking More Layers in 3D NAND Flash [PDF]

Micromachines, 2023
The bit density is generally increased by stacking more layers in 3D NAND Flash. Gate-induced drain leakage (GIDL) erase is a critical enabler in the future development of 3D NAND Flash.
Tao Yang, Bao Zhang, Qi Wang, Lei Jin, Zhiliang Xia   +4 more
doaj   +3 more sources

A Stepped Gate Oxide Structure for Suppressing Gate-Induced Drain Leakage in Fully Depleted Germanium-on-Insulator Multi-Subchannel Tunneling Field-Effect Transistors [PDF]

Micromachines
To address the severe gate-induced drain leakage (GIDL) issue in fully depleted germanium-on-insulator (FD-GeOI) multi-subchannel tunneling field-effect transistors (MS TFETs), this paper proposes a stepped gate oxide (SGO) structure.
Rui Chen, Liming Wang, Ruizhe Han, Keqin Liao, Xinlong Shi, Peijian Zhang, Huiyong Hu   +6 more
doaj   +3 more sources

Origin of the Temperature Dependence of Gate-Induced Drain Leakage-Assisted Erase in Three-Dimensional nand Flash Memories [PDF]

Micromachines
Through detailed experimental and modeling activities, this paper investigates the origin of the temperature dependence of the Erase operation in 3D nand flash arrays.
David G. Refaldi, Gerardo Malavena, Luca Chiavarone, Alessandro S. Spinelli, Christian Monzio Compagnoni   +4 more
doaj   +4 more sources

Insight into over Repair of Hot Carrier Degradation by GIDL Current in Si p-FinFETs Using Ultra-Fast Measurement Technique [PDF]

Nanomaterials, 2023
In this article, an experimental study on the gate-induced drain leakage (GIDL) current repairing worst hot carrier degradation (HCD) in Si p-FinFETs is investigated with the aid of an ultra-fast measurement (UFM) technique (~30 μs).
Hao Chang, Guilei Wang, Hong Yang, Qianqian Liu, Longda Zhou, Zhigang Ji, Ruixi Yu, Zhenhua Wu, Huaxiang Yin, Anyan Du, Junfeng Li, Jun Luo, Chao Zhao, Wenwu Wang   +13 more
doaj   +2 more sources

Role of mechanical stress on the electrothermal and OFF state current in scaled FinFET devices [PDF]

Scientific Reports
The electrothermal characteristics and leakage current of a tall FinFET device were investigated using the hydrodynamic transport model coupled with a quantum-corrected diffusive transport mechanism-based TCAD simulation.
Shubham, Rajan Kumar Pandey
doaj   +2 more sources

Engineering the ferroelectric polarization to optimize the GIDL and negative output conductance in negative capacitance FET [PDF]

Scientific Reports
This paper presents the optimization of the gate induced drain leakage (GIDL) and negative output conductance (NOC) effect in ferroelectric negative capacitance (NC) FET by engineering the polarization of ferroelectric. The improvement in NOC and GIDL is
Vijay Sai Thota, Sandeep Moparthi, Kalyanbrata Ghosh   +2 more
doaj   +2 more sources

Optimization of Gate-All-Around Device to Achieve High Performance and Low Power with Low Substrate Leakage [PDF]

Nanomaterials, 2022
In this study on multi-nanosheet field-effect transistor (mNS-FET)—one of the gate-all-around FETs (GAAFET) in the 3 nm technology node dimension—3D TCAD (technology computer-aided design) was used to attain optimally reduced substrate leakage from ...
Changhyun Yoo, Jeesoo Chang, Sugil Park, Hyungyeong Kim, Jongwook Jeon   +4 more
doaj   +2 more sources

Incremental Pulse-Width Erase (IPWE) Scheme for Fast and Variation-Tolerant GIDL Erase of 3D NAND Flash [PDF]

Micromachines
In this work, we propose an incremental pulse-width erase (IPWE) scheme for fast and variation-tolerant gate-induced drain leakage (GIDL) erase of 3D NAND flash.
Youngjun Park, Wonbo Shim
doaj   +2 more sources

Scaling, Leakage Current Suppression, and Simulation of Carbon Nanotube Field-Effect Transistors [PDF]

Nanomaterials
Carbon nanotube field-effect transistors (CNTFETs) are becoming a strong competitor for the next generation of high-performance, energy-efficient integrated circuits due to their near-ballistic carrier transport characteristics and excellent suppression ...
Weixu Gong, Zhengyang Cai, Shengcheng Geng, Zhi Gan, Junqiao Li, Tian Qiang, Yanfeng Jiang, Mengye Cai   +7 more
doaj   +2 more sources

Suppressing Gate-Induced Drain Leakage with an Asymmetric Gate Design in HiPco CNT FETs [PDF]

Nanomaterials
Carbon nanotube field-effect transistors (CNT FETs) hold great promise for extending Moore’s Law, yet their performance is critically limited by excessive off-state leakage, caused by band-to-band tunneling (BTBT) in narrow bandgap CNT channels.
Hui Ma, Senbiao Gu, Minglong Zhai, Honggang Liu   +3 more
doaj   +2 more sources