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Reliability Study of Strained Silicon SOI TFET
2025 5th International Conference on Electrical, Computer and Energy Technologies (ICECET)Urmila Bag +3 more
openaire +1 more source
Study of line-TFET analog performance comparing with other TFET and MOSFET architectures [PDF]
Abstract In this work the Line-TFET performance is compared with MOSFET and Point-TFET devices, with different architectures (FinFET and GAA:Gate-All-Around) at both room and high temperatures. This analysis is based on the experimental basic analog parameters such as transconductance (gm), output conductance (gD) and intrinsic voltage gain (AV ...
João Antonio Martino +2 more
exaly +6 more sources
F-Shaped Tunnel Field-Effect Transistor (TFET) for the Low-Power Application [PDF]
In this report, a novel tunnel field-effect transistor (TFET) named ‘F-shaped TFET’ has been proposed and its electrical characteristics are analyzed and optimized by using a computer-aided design simulation.
Garam Kim, Yoon Kim, Jang Hyun Kim
exaly +4 more sources
Improved bilayer phosphorene TFET inverter performance by reduction of ambipolarity [PDF]
A comprehensive study on the degradation of inverter output voltage based on double-gated (DG) bilayer Phosphorene complementary tunnel-FETs is presented.
Dip Joti Paul, Quazi D. M. Khosru
doaj +2 more sources
Temperature dependence of analogue/RF performance, linearity and harmonic distortion for dual‐material gate‐oxide‐stack double‐gate TFET [PDF]
This article presents an investigation report of the effects of temperature variation in the range of 300 to 480 K on electrical performance parameters of conventional dual‐material double‐gate tunnel field effect transistor (DMDG‐TFET) and dual‐material
Satyendra Kumar
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Drive Current Enhancement in TFET by Dual Source Region [PDF]
This paper presents tunneling field-effect transistor (TFET) with dual source regions. It explores the physics of drive current enhancement. The novel approach of dual source provides an effective technique for enhancing the drive current.
Zhi Jiang +4 more
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Rigorous Study on Hump Phenomena in Surrounding Channel Nanowire (SCNW) Tunnel Field-Effect Transistor (TFET) [PDF]
In this paper, analysis and optimization of surrounding channel nanowire (SCNW) tunnel field-effect transistor (TFET) has been discussed with the help of technology computer-aided design (TCAD) simulation.
Seung-Hyun Lee +5 more
doaj +2 more sources
The Programming Optimization of Capacitorless 1T DRAM Based on the Dual-Gate TFET [PDF]
The larger volume of capacitor and higher leakage current of transistor have become the inherent disadvantages for the traditional one transistor (1T)-one capacitor (1C) dynamic random access memory (DRAM).
Wei Li +4 more
doaj +2 more sources

