Results 31 to 40 of about 1,665 (175)
Electrical characterization of si nanowire GAA-TFET based ondimensions downscaling
, 2023 This research paper explains the effect of the dimensions of Gate-all-aroundSi nanowire tunneling field effect transistor (GAA Si-NW TFET) onON/OFF current ratio, drain induces barrier lowering (DIBL), sub-thresholdswing (SS), and threshold voltage (VT).
Firas Natheer (16958826)
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IEEE Open Journal of NanotechnologyIn this paper, using calibrated simulation we have reported a dielectric modulated epitaxial tunnel layer TFET (DM ETL-TFET) for the label-free detection of biomolecules. We have shown that due to vertical tunneling direction, the ETL-TFET exhibits $\sim$
Kunal Aggarwal, Avinash Lahgere
doaj +1 more source
TFET-Based Op-amp Design for Computational Circuits
, 2021 Tunnel field effect transistor (TFET) is rapidly replacing MOSFETs in low power designs and applications. This is due to high leakage power that engendered from scaling down CMOS transistors.
Naheem Olakunle Adesina +5 more
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IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, 2020 The tunnel field-effect transistor (TFET) is a promising solution for high energy-efficient circuits. Based on the band-to-band tunneling (BTBT) condition, fast switching characteristic with a steep subthreshold swing (SS) in the ultralow-voltage ...
Jo-Han Hung +5 more
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Drain current model for a hetero‐dielectric single gate tunnel field effect transistor ( HDSG TFET )
, 2022 Tunnel field effect transistor (TFET) is a potential candidate to replace CMOS in deep-submicron region due to its lower SS (subthreshold swing,
Singh, Ajay Kumar +2 more
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Performance Analysis of Double Material Gate (DG) -TFET with Channel Doping
, 2022 Double Material Gate (DG) Tunnel Field Effect Transistor (TFET) is proposed in this paper with current semiconductor materials analogous to Silicon dioxide (Sio2) and Hafnium Oxide (Hfo2) in 5 nm regime with symmetrical Gate to resolve the challenges ...
V, Raju +6 more
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Electrostatically-Doped Hetero-Barrier Tunnel Field Effect Transistor: Design and Investigation
IEEE Access, 2018 In this paper, an electrostatically-doped hetero-barrier tunnel-field-effect-transistor (EDHet-TFET) based on stepped broken-gap (type-III) is simulated, investigated, and compared with the conventionally-doped stepped broken-gap hetero-barrier TFET (Het-
M. Ehteshamuddin +2 more
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Atomic Layer Deposition in Transistors and Monolithic 3D Integration
Advanced Functional Materials, Volume 36, Issue 41, 21 May 2026.Transistors are fundamental building blocks of modern electronics. This review summarizes recent progress in atomic layer deposition (ALD) for the synthesis of two‐dimensional (2D) metal oxides and transition‐metal dichalcogenides (TMDCs), with particular emphasis on their enabling role in monolithic three‐dimensional (M3D) integration for next ...
Yue Liu +5 more
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A New On-Chip ESD Strategy Using TFETs-TCAD Based Device and Network Simulations
IEEE Journal of the Electron Devices Society, 2018 For the first time, this paper reports the quasi-static behavior and the applicability of the tunnel field effect transistor (TFET) for the on-chip electrostatic discharge (ESD) protection. ESD evaluations are performed on 28-nm fully depleted silicon-on-
Radhakrishnan Sithanandam +1 more
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Emerging single‐element ferroelectrics: From theory to experiment
InfoMat, Volume 8, Issue 4, April 2026.This review explores recent developments in single‐element ferroelectrics, covering mechanisms of ferroelectric behavior, their crystal structures, key preparation methods, ferroelectric performance characteristics, and promising device applications in field‐effect transistors, photodetectors, and visual perceptrons.
Run Zhao +7 more
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