Results 11 to 20 of about 1,965 (222)
Design of a gate-all-around arch-shaped tunnel-field-effect-transistor-based capacitorless DRAM [PDF]
Discover NanoIn this study, we designed and analyzed a single-transistor dynamic random-access memory (1 T-DRAM) based on an arch-shaped gate-all-around tunnel field-effect transistor (GAA ARCH-TFET), featuring an Si/SiGe heterostructure, for high-density memory ...
Seung Ji Bae +9 more
doaj +2 more sources
Fringe-fields-modulated double-gate tunnel-FET biosensor [PDF]
Scientific ReportsThis paper aims to evaluate a groundbreaking bio-TFET that utilizes the fringe fields capacitance concept to detect neutral and charged biomolecules. While facilitating fabrication process and scalability, this innovative bio-TFET is able to rival the ...
Iman Chahardah Cherik, Saeed Mohammadi
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Novel Ge-Based Plasma TFET with High Rectification Efficiency for 2.45 GHz Microwave Wireless Weak Energy Transmission [PDF]
MicromachinesThe enhancement of rectification efficiency in 2.45 GHz microwave wireless weak energy transmission systems is centred on rectifier device selection.
Weifeng Liu, Sihan Bi, Jianjun Song
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Temperature characteristics of Gate all around nanowirechannel Si-TFET [PDF]
, 2023 This paper study the impact of working temperature on the electrical characteristicsof gate all around nanowire channel Si-TFET and examines the effect of working temperatureon threshold voltage, transcondactance (gm), ION/IOFF ratio, drain induced ...
Firas Natheer (16958826)
core +1 more source
Optimization of Tunnel Field-Effect Transistor-Based ESD Protection Network
Crystals, 2021 The tunnel field-effect transistor (TFET) is a potential candidate for replacing the reverse diode and providing a secondary path in a whole-chip electrostatic discharge (ESD) protection network.
Zhihua Zhu +5 more
doaj +1 more source
Performance Evaluation of Epitaxial Layer Based Gate Modulated TFET (GM-TFET) [PDF]
Silicon, 2021 Abstract This paper reports the performance of an epitaxial layer (ETL) based gate modulated (GM-TFET) through 3D Technology Computer Aided Design (TCAD) simulations. The architecture utilizes effects of both vertical tunneling and lateral tunneling phenomena to improve the device performance.
Rajesh Saha +3 more
openaire +1 more source
Journal of Engineering Technology and Applied Physics, 2022 Although, dynamic power in portable mobile devices can be reduced by reducing power supply VDDon the cost of increased leakage current. Therefore, maintaining low leakage current in the device is serious issue for minimizing overall ...
Tan Chun Fui +2 more
doaj +1 more source
Journal of Engineering Technology and Applied Physics, 2023 To meet the performance requirements of low power mobile devices, a device with a high ION/IOFF ratio at low-VDD is needed. TFETs are gaining popularity due to their low subthreshold slope and high transconductance compared to MOSFETs.
Tan Chun Fui, Ajay Kumar Singh
doaj +1 more source
Temperature characteristics of Gate all around nanowire channel Si-TFET [PDF]
, 2021 This paper study the impact of working temperature on the electrical characteristics of gate all around nanowire channel Si-TFET and examines the effect of working temperature on threshold voltage, transcondactance (gm), ION/IOFF ratio, drain induced ...
Hashim, Yasir +2 more
core +1 more source
Electrical characterization of si nanowire GAA-TFET based ondimensions downscaling [PDF]
, 2023 This research paper explains the effect of the dimensions of Gate-all-aroundSi nanowire tunneling field effect transistor (GAA Si-NW TFET) onON/OFF current ratio, drain induces barrier lowering (DIBL), sub-thresholdswing (SS), and threshold voltage (VT).
Firas Natheer (16958826)
core +1 more source