Results 11 to 20 of about 2,142 (219)
Improved bilayer phosphorene TFET inverter performance by reduction of ambipolarity
A comprehensive study on the degradation of inverter output voltage based on double-gated (DG) bilayer Phosphorene complementary tunnel-FETs is presented.
Dip Joti Paul, Quazi D. M. Khosru
doaj +2 more sources
Drive Current Enhancement in TFET by Dual Source Region [PDF]
This paper presents tunneling field-effect transistor (TFET) with dual source regions. It explores the physics of drive current enhancement. The novel approach of dual source provides an effective technique for enhancing the drive current.
Zhi Jiang +4 more
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In this paper, analysis and optimization of surrounding channel nanowire (SCNW) tunnel field-effect transistor (TFET) has been discussed with the help of technology computer-aided design (TCAD) simulation.
Seung-Hyun Lee +5 more
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The Programming Optimization of Capacitorless 1T DRAM Based on the Dual-Gate TFET
The larger volume of capacitor and higher leakage current of transistor have become the inherent disadvantages for the traditional one transistor (1T)-one capacitor (1C) dynamic random access memory (DRAM).
Wei Li +4 more
doaj +2 more sources
Temperature characteristics of Gate all around nanowire channel Si-TFET [PDF]
This paper study the impact of working temperature on the electrical characteristics of gate all around nanowire channel Si-TFET and examines the effect of working temperature on threshold voltage, transcondactance (gm), ION/IOFF ratio, drain induced ...
Hashim, Yasir +2 more
core +1 more source
Temperature characteristics of Gate all around nanowirechannel Si-TFET
This paper study the impact of working temperature on the electrical characteristicsof gate all around nanowire channel Si-TFET and examines the effect of working temperatureon threshold voltage, transcondactance (gm), ION/IOFF ratio, drain induced ...
Firas Natheer (16958826)
core +1 more source
Fabrication and Electrical Characteristics of ZnSnO/Si Bilayer Tunneling Filed-Effect Transistors
We demonstrate improvement of electrical characteristics of a bilayer tunneling field effect transistor (TFET) composed of an n-type zinc-tin-oxide (ZnSnO) channel with superior thickness uniformity and a p-type Si source.
Kimihiko Kato +4 more
doaj +1 more source
Simulation Study of the Double-Gate Tunnel Field-Effect Transistor with Step Channel Thickness
Double-gate tunnel field-effect transistor (DG TFET) is expected to extend the limitations of leakage current and subthreshold slope. However, it also suffers from the ambipolar behavior with the symmetrical source/drain architecture.
Maolin Zhang +4 more
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Low-power Hybrid TFET-CMOS Memory [PDF]
The power consumption and the switching speed of the current CMOS technology have reached their limits. In contrast, architecture design within computer systems are continuously seeking more performance and efficiency. Advanced technologies that optimize
Gopinath, Anoop
core +2 more sources
In this study, the authors propose a work function engineered (WFE) triple metal (TM) tunnel field‐effect transistor (TFET) device, which exhibits lower subthreshold slope (SS) and better on to off current ratio in comparison with conventional double ...
Ria Bose, Jatindra Nath Roy
doaj +1 more source

