Results 41 to 50 of about 1,665 (175)
Strain and Dimension Effects on the Threshold Voltage of Nanoscale Fully Depleted Strained-SOI TFETs
Advances in Condensed Matter Physics, 2015 A novel nanoscale fully depleted strained-SOI TFET (FD-SSOI TFET) is proposed and exhaustively simulated through Atlas Device Simulator. It is found that FD-SSOI TFET has the potential of improved on-current and steep subthreshold swing. Furthermore, the
Yu-Chen Li +3 more
doaj +1 more source
Investigation of gate leakage current in TFET: A semi-numerical approach
Alexandria Engineering Journal, 2023 Tunneling FET (TFET) has been demonstrated as a favorable candidate to replace conventional MOSFETs in low-power applications. However, there are many challenges that should be overcome to efficiently operate the TFET.
N.M.S. Tawfik +6 more
doaj +1 more source
Advanced Electronic Materials, Volume 12, Issue 5, 9 March 2026.Sub‐5 nm double‐gate MOSFETs based on 2D SiAs monolayers are investigated using quantum transport simulations. By engineering source‐drain underlap regions, the devices achieve exceptional on‐currents of up to 1206 µA µm−1, surpassing the ITRS 2028 high‐performance targets.
Dogukan Hazar Ozbey, Engin Durgun
wiley +1 more source
RF energy harvesting using emerging TFET technology
, 2016 Radio frequency (RF) energy harvesting circuit using a 20 nm InAs double-gate n-channel TFET has been studied. RF-DC converter using a two-stage cross-coupled rectifier is evaluated.
null Jiann-Shiun Yuan +3 more
core +1 more source
IEEE Journal of the Electron Devices Society, 2019 Using a tight-binding mode-space NEGF technique, we explore the essential physics, design and performance potential of the III-V core-shell (CS) nanowire (NW) heterojunction tunneling field-effect transistor (TFET).
Aryan Afzalian +4 more
doaj +1 more source
Low Power and Energy‐Efficient Design of MTJ/FinFET Circuits
Engineering Reports, Volume 8, Issue 3, March 2026.This work begins by outlining the fundamental concepts of MTJs, FinFETs, and the conventional hybrid CMOS/MTJ framework. It then explains the operating mechanism and configuration of the proposed STT‐MTJ/FinFET‐based OR logic gate. The final sections present the simulation outcomes and analyze the influence of FinFET fin variation.
Pillem Ramesh, Atul S. M. Tripathi
wiley +1 more source
Graphene antidot nanoribbon tunnel field‐effect transistor
Micro & Nano Letters, 2022 A graphene nanoribbon tunnel field‐effect transistor (TFET) model is proposed, in which the antidot pattern is used to generate the heterojunction (HJ) band structure.
Zhixing Xiao
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Design of 7T SRAM Using InGaAs-Dual Pocket-Dual Gate-Tunnel FET for IoT Applications
IEEE Access, 2023 The Internet of Things (IoT) is becoming increasingly popular in areas like wearable communication devices, biomedical devices, and home automation systems.
Gadarapulla Rasheed +1 more
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Design and TCAD Simulation of p+–n+ InAs‐Based TFET
Nano Select, Volume 7, Issue 3, March 2026.A physics‐based design and optimization of a p+−n+${{p}^ + } - {{n}^ + }$ InAs tunnel field‐effect transistor is presented using calibrated quantum‐corrected TCAD simulations. By employing a composite figure of merit that unifies digital and RF metrics, the proposed homojunction architecture achieves steep subthreshold swing, enhanced cutoff frequency,
Muhammad Elgamal +5 more
wiley +1 more source
IEEE Journal of the Electron Devices Society, 2018 In this paper, a new tunnel FET (TFET)-based power management circuit (PMC) is proposed for weak dc energy harvesting sources. Thanks to their particular carrier injection mechanisms, TFETs can be used to design efficient energy harvesting circuits by ...
David Nunes Cavalheiro +2 more
doaj +1 more source