Results 41 to 50 of about 1,965 (222)
In this paper, using calibrated simulation we have reported a dielectric modulated epitaxial tunnel layer TFET (DM ETL-TFET) for the label-free detection of biomolecules. We have shown that due to vertical tunneling direction, the ETL-TFET exhibits $\sim$
Kunal Aggarwal, Avinash Lahgere
doaj +1 more source
CMOS Sensor Nodes with Sub-PicoWatt TFET Memory [PDF]
International audienceThis paper describes the applicability of Tunnel FETs (TFET) to ultra-low-power sensor-node embedded Static Random-Access Memories (SRAM).
Makosiej, Adam +4 more
core +1 more source
Low-power Hybrid TFET-CMOS Memory [PDF]
The power consumption and the switching speed of the current CMOS technology have reached their limits. In contrast, architecture design within computer systems are continuously seeking more performance and efficiency. Advanced technologies that optimize
Gopinath, Anoop
core +2 more sources
Design of a Hybrid SET-TFET Nanoscale IC for RF and Microwave Frequencies [PDF]
Device size has now reached the nanoscale range due to advancements in technology and scaling in the fields of very large-scale integration. The single-electron transistor (SET) is a promising solid-state device that can provide an extension for Moore ...
Hazzazi, Fawwaz +5 more
core +1 more source
The tunnel field-effect transistor (TFET) is a promising solution for high energy-efficient circuits. Based on the band-to-band tunneling (BTBT) condition, fast switching characteristic with a steep subthreshold swing (SS) in the ultralow-voltage ...
Jo-Han Hung +5 more
doaj +1 more source
Studies of Vertical Two\ue2Gate PN type TFET and Schottky Barrier BJT type TFET [PDF]
In this thesis, we proposes a vertical Two-Gate PN type Tunneling Field-Effect Transistor (VTG PN-TFET) architecture and the novel Schottky Barrier BJT type Tunneling Field-Effect Transistor. (SB BJT-TFET).
Chen, Yu-Jen
core
Tunnel field effect transistor (TFET) with lateral oxidation [PDF]
A vertical-mode tunnel field-effect transistor (TFET) is provided with an oxide region that may be laterally positioned relative to a source region.
Lee, Jack C., Zhao, Han
core +1 more source
Strain and Dimension Effects on the Threshold Voltage of Nanoscale Fully Depleted Strained-SOI TFETs
A novel nanoscale fully depleted strained-SOI TFET (FD-SSOI TFET) is proposed and exhaustively simulated through Atlas Device Simulator. It is found that FD-SSOI TFET has the potential of improved on-current and steep subthreshold swing. Furthermore, the
Yu-Chen Li +3 more
doaj +1 more source
Electrostatically-Doped Hetero-Barrier Tunnel Field Effect Transistor: Design and Investigation
In this paper, an electrostatically-doped hetero-barrier tunnel-field-effect-transistor (EDHet-TFET) based on stepped broken-gap (type-III) is simulated, investigated, and compared with the conventionally-doped stepped broken-gap hetero-barrier TFET (Het-
M. Ehteshamuddin +2 more
doaj +1 more source
Electron‐Wave Interference in Zener Tunneling Induced by Dopant Clusters in Silicon pn Junctions
Current oscillations are revealed in the Zener tunneling regime of Si nanoscale pn junctions and are attributed to the interference of coherent electron‐waves in band‐to‐band tunneling transport. Temperature dependence, simulations of random dopant distributions, and numerical interference calculations collectively demonstrate that the interference ...
Daris Alfafa +4 more
wiley +1 more source

