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Anomalous Current Gain Degradation in Bipolar Transistors

29th International Reliability Physics Symposium, 1991
The current gain of a bipolar transistor, h/sub FE/, is degraded by the emitter-base reverse-bias stress. The mechanism has been interpreted to be due to an increase in the interface state density, while its dependence on stress time has been found to be proportional to t/sup n/, where n is 0.5 to 1.
Y. Nitsu   +3 more
openaire   +1 more source

Analysis of Degradation Phenomena in Bipolar Degradation Screening Process for SiC-MOSFETs

2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD), 2019
We have developed a 3.3 kV ultra-high power density SiC power module, which was realized by fulfilment with only SiC-MOSFETs. As a countermeasure for bipolar degradation issues related to body diodes in the MOSFET structure, a high throughput screening process has been introduced.
Takashi Ishigaki   +8 more
openaire   +1 more source

Degradation Mechanisms in SiC Bipolar Junction Transistors

2008 Device Research Conference, 2008
SiC power bipolar junction transistors (BJTs) are believed to have the potential of operating reliably at much higher junction temperatures as compared to SiC MOSFETs. The obstacle for commercialization of SiC BJTs is the presence of degradation in both on-resistance and current gain, first detected by Agarwal et al.
null Qingchun Zhang   +6 more
openaire   +1 more source

Hot Carrier Degradation of Gain in Bipolar Transistors

MRS Proceedings, 1995
AbstractIn this paper hot carrier related aging of n-p-n bipolar transistors is investigated experimentally and theoretically to bring physical insight into the bipolar transistor hFE (common emitter current gain) degradation. Electrical stress experiments are performed on transistors with different base doping profiles at varying temperatures ...
Isik C. Kizilyalli, Jeff D. Bude
openaire   +1 more source

Reliability Degradation Mechanisms of Horizontal Current Bipolar Transistor

IEEE Transactions on Electron Devices, 2016
The impact of the reverse-bias emitter-base stress and the mixed-mode stress on horizontal current bipolar transistor (HCBT) reliability characteristics is analyzed. Under the stress conditions, hot carriers are generated and injected toward silicon-oxide interfaces above and below HCBT's emitter n+ polysilicon region where the traps responsible for ...
Josip Zilak   +2 more
openaire   +3 more sources

Degradation of the DC current capability in long-emitter bipolar transistors

9th International Conference on Electronics, Circuits and Systems, 2003
The degradation of current capability in high speed bipolar transistors caused by the voltage drop across the distributed resistance of the emitter finger has been studied. Experimental results show that in very-long emitter transistors this phenomenon becomes tangible even at current levels well below the onset of high injection.
F. CARRARA   +3 more
openaire   +2 more sources

Temperature dependence of hot-electron degradation in bipolar transistors

IEEE Transactions on Electron Devices, 1993
Degradation of the base current and current gain observed in bipolar transistors that were electrically stressed at-75, 175, and 240 degrees C for 1000 h with a constant reverse-bias voltage applied to the emitter-base junctions is discussed. The rate of degradation was found to be temperature-dependent with a larger degradation occurring at the lower ...
C.-J. Huang   +4 more
openaire   +1 more source

Analysis of hot carrier-induced degradation of Horizontal Current Bipolar Transistor (HCBT)

2017 40th International Convention on Information and Communication Technology, Electronics and Microelectronics (MIPRO), 2017
The relative contribution of the hot electrons and hot holes to the reliability degradation of the Horizontal Current Bipolar Transistor (HCBT) is investigated by TCAD simulations. The base current (IB) degradation, obtained by the reverse-bias emitter-base (EB) and mixed-mode stress measurements, is caused by a hot carrier-induced interface trap ...
Suligoj, Tomislav   +2 more
openaire   +2 more sources

Bipolar transistor degradation under dynamic hot carrier stress

Solid-State Electronics, 1995
Abstract Hot carrier induced bipolar transistor degradation under dynamic stress is studied. The model, ΔIB ∝ (IR1.8 t)0.5, established from d.c. emitter-base reverse bias stress measurements is found to be still valid under pulse stress down to 20 ns pulse width, where ΔIB is drift of base current, IR is reverse emitter-base current under stress and
Tadahiko Horiuchi   +2 more
openaire   +1 more source

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