Results 31 to 40 of about 1,893,473 (266)

Modified 32-Bit Shift-Add Multiplier Design for Low Power Application

Iranian Journal of Electrical and Electronic Engineering, 2020
Multiplication is a basic operation in any signal processing application. Multiplication is the most important one among the four arithmetic operations like addition, subtraction, and division.
R. Pinto
doaj  

Design of multiplier and its VLSI implementation [PDF]

, 1999
A 3-bit recoding algorithm is used to implement a parallel multiplier in two's complement. The circuits at gate level for implementing 8 x 8-bit multiplier are presented.
Liu, Qi
core   +2 more sources

Low complexity bit-parallel $GF(2^m)$ multiplier for all-one polynomials [PDF]

, 2012
This paper presents a new bit-parallel multiplier for the finite field $GF(2^m)$ generated with an irreducible all-one polynomial. Redundant representation is used to reduce the time delay of the proposed multiplier, while a three-term Karatsuba-like ...
Yin Li, Xiao-ning Xie, Gong-liang Chen
core   +1 more source

Dual native G‐quadruplex folding is associated with chromatin looping at the MYC locus

FEBS Open Bio, EarlyView.
BG4‐detectable G‐quadruplex (G4) in HaCaT and NHEK keratinocytes identified folded and unfolded G4s enriched at promoters/TSSs and active enhancers, whereas unfolded G4s also overlapped weak/poised enhancers. At MYC–PVT1, 3C‐qPCR detected enhancer–promoter looping only when G4s were simultaneously folded at both regulatory elements under native ...
Dieila Giomo de Lima, Gustavo Narvaes Guimarães, Emilyane de Oliveira Santana Amaral, Bianca Caroline Figueiredo Bianco, Manuel Jara‐Espejo, Sérgio Roberto Peres Line, Ana Paula de Souza, Aline Cristiane Planello   +7 more
wiley   +1 more source

All‐in‐One Analog AI Hardware: On‐Chip Training and Inference with Conductive‐Metal‐Oxide/HfOx ReRAM Devices

Advanced Functional Materials, EarlyView.
An all‐in‐one analog AI accelerator is presented, enabling on‐chip training, weight retention, and long‐term inference acceleration. It leverages a BEOL‐integrated CMO/HfOx ReRAM array with low‐voltage operation (<1.5 V), multi‐bit capability over 32 states, low programming noise (10 nS), and near‐ideal weight transfer.
Donato Francesco Falcone, Victoria Clerico, Wooseok Choi, Tommaso Stecconi, Folkert Horst, Laura Bégon‐Lours, Matteo Galetta, Antonio La Porta, Nikhil Garg, Fabien Alibart, Bert Jan Offrein, Valeria Bragaglia   +11 more
wiley   +1 more source

Optimum logic design for a fast parallel multiplier [PDF]

This thesis discusses a method of fast multiplication by parallel addition of summands. A logical element that performs this parallel addition is defined, and examples of the element realized with threshold logic are shown.
Siemens, Phillip Dennis
core   +5 more sources

RADIX-10 PARALLEL DECIMAL MULTIPLIER [PDF]

, 2012
This paper introduces novel architecture for Radix-10 decimal multiplier. The new generation of highperformance decimal floating-point units (DFUs) is demanding efficient implementations of parallel decimal multiplier.
PANSE, TEJASWINI, INGLE, MRUNALINI E., TEJASWINI PANSE, MRUNALINI E. INGLE   +3 more
core   +1 more source

Integration of Low‐Voltage Nanoscale MoS2 Memristors on CMOS Microchips

Advanced Functional Materials, EarlyView.
This article presents the first monolithic integration of nanoscale MoS2‐based memristors into the back‐end‐of‐line of foundry‐fabricated CMOS microchips in a one‐transistor‐one‐resistor (1T1R) architecture. The MoS2‐based 1T1R cells exhibit forming‐free, nonvolatile resistive switching with ultra‐low operating voltages, low cycle‐to‐cycle variability ...
Jimin Lee, Sofía Cruces, Xiaohua Liu, Yang Chen, Vasilis A. Maroufidis, Janghyun Jo, Lukas Völkel, Dennis Braun, Michael Möller, Leon Brackmann, Holger Kalisch, Michael Heuken, Andrei Vescan, Rafal E. Dunin‐Borkowski, Joachim Mayer, Stefan Wiefels, Max C. Lemme   +16 more
wiley   +1 more source

Optoelectronic Synaptic Devices Using Molecular Telluride Phase‐Change Inks for Three‐Factor Learning

Advanced Functional Materials, EarlyView.
Optoelectronic synaptic devices based on solution‐processed molecular telluride GST‐225 phase‐change inks are demonstrated for three‐factor learning. A global optical signal broadcast through a silicon waveguide induces non‐volatile conductance updates exclusively in locally electrically flagged memristors.
Kevin Portner, Dhananjeya Kumaar, Giacomo Torti, Killian Keller, Till Zellweger, Florian M. Schenk, Christoph Weilenmann, Daniel Chelladurai, Vara Prasad Jonnalagadda, Ghazi Sarwat Syed, Vanessa Wood, Jürg Leuthold, Alexandros Emboras, Maksym Yarema, Mathieu Luisier   +14 more
wiley   +1 more source

Reconfigurable implementation of GF(2^m) bit-parallel multipliers

2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018
Hardware implementations of arithmetic operations over binary finite fields GF(2^m) are widely used in several important applications, such as cryptography, digital signal processing and error-control codes. In this paper, efficient. reconfigurable implementations of bit-parallel canonical basis multipliers over binary fields generated by type II ...
openaire   +2 more sources