Results 21 to 30 of about 18,840,038 (173)
Low-Power And High Performance Of An Optimized FinFET Based 8T SRAM Cell Design [PDF]
, 2019 The development of the nanotechnology leadsto the shrinking of the size of the transistors to nanometerregion. However, there are a lot of challenges due to sizescaling of the transistors such as short channel effects (SCEs)and threshold voltage roll-off
A. Riyadi, Munawar +4 more
core +2 more sources
IEEE Journal of the Electron Devices Society, 2015 This paper presents the results of a systematic theoretical investigation on the impact of gate height on the analog and radio-frequency (RF) performances of underlap-FinFET devices.
Sayani Ghosh +3 more
doaj +1 more source
Review on suitable eDRAM configurations for next nano-metric electronics era [PDF]
, 2018 We summarize most of our studies focused on the main reliability issues that can threat the gain-cells eDRAM behavior when it is simulated at the nano-metric device range has been collected in this review. So, to outperform their memory cell counterparts,
Amat, Esteve +3 more
core +3 more sources
Silicon-Based Micromachining Process for Flexible Electronics [PDF]
, 2019 In this chapter, we introduce silicon-based micromachining process and devices for flexible electronics application. Silicon-based flexible electronics have the unique advantage over other polymer-based process that leverage the traditional standard CMOS
Wu, Tao, Yang, Jiye
core +2 more sources
Benchmarking the screen-grid field effect transistor (SGrFET) for digital applications
, 2010 Continuous scaling of CMOS technology has now reached a state of evolution, therefore, novel device structures and new materials have been proposed for this purpose.
Shadrokh, Yasaman, Shadrokh, Yasaman
core +1 more source
Memories - Materials, Devices, Circuits and SystemsIn this work, a high-k In0.53Ga0.47As silicon-on-insulator FinFET (InGaAs–SOI–FinFET) is presented for high-switching and ultra-low power applications at 7 nm gate length.
Priyanka Agrwal, Ajay Kumar
doaj +1 more source
IEEE Journal of the Electron Devices Society, 2020 We successfully fabricate the Si0.8Ge0.2 channel fin field-effect-transistor (FinFET) with 5 nm ultra-thin fin width and high aspect ratio ( $\sim 10\times $ ) on silicon-on-insulator (SOI) substrate by simple two-step dry etching.
Chong-Jhe Sun +7 more
semanticscholar +1 more source
High-k dielectrics on (100) and (110) n-InAs: Physical and electrical characterizations
AIP Advances, 2014 Two high-k dielectric materials (Al2O3 and HfO2) were deposited on n-type (100) and (110) InAs surface orientations to investigate physical properties of the oxide/semiconductor interfaces and the interface trap density (Dit).
C. H. Wang +18 more
doaj +1 more source
Out-of-Equilibrium Carrier Dynamics in Graphene and Graphene-based Devices for High-Performance Electronics [PDF]
, 2019 [ES]Con los límites tecnológicos de las tecnologías de semiconductores tradicionales alcanzando los límites de escalado y integración en chip, el descubrimiento del grafeno y sus impresionantes propiedades supuso una prometedora alternativa para el ...
Iglesias Pérez, José Manuel
core +2 more sources
Advanced Science, EarlyView.A neuromorphic computing platform using spin‐orbit torque‐controlled magnetic textures is reported. The device implements bio‐inspired synaptic functions and achieves high performance in both pattern recognition (>93%) and combinatorial optimization (>95%), enabling unified processing of cognitive and optimization tasks.
Yifan Zhang +13 more
wiley +1 more source