Results 71 to 80 of about 19,628,440 (150)

Multi-Channel Step FinFET With Spacer Engineering

Multi-channel FinFET ( $\text{M}_{\textbf {ch}}$ -FinFET) is an emerging device having promising use due to its excellent driving capability. In this paper, we have investigated the significance of multiple channels of FinFET configuration.
Alex James, Rinku Rani Das
core   +1 more source

Evaluating the Impact of Resistive Defects on FinFET-Based SRAMs

, 2017
International audienceThe development of FinFET technology has made possible the continuous scaling-down of CMOS technological nodes. In parallel, the increasing need to store more information has resulted in the fact that Static Random Access Memories ...
Poehls, Letícia, Balen, Tiago, R., Medeiros, Guilherme, C., Copetti, Thiago, S., Tiago R. Balen, Letícia M. B. Poehls, Thiago S. Copetti, Guilherme C. Medeiros   +7 more
core   +1 more source

Next Generation FinFET Devices in Bulk Silicon Technology and Their Benefits for ESD Robustness

, 2009
This paper reports the first ESD results on NMOS and gated diode devices processed in a bulk FinFET technology. A comparison with SOI FinFET performance is carried out, highlighting the role of device geometry and three-dimensional architecture. Moreover,
C. RUSS, GRIFFONI, ALESSIO, D. TREMOUILLES, M. SCHOLZ, L. WITTERS, G. GROESENEKEN, S. THIJS, N. COLLAERT, D. LINTEN, MENEGHESSO, GAUDENZIO   +9 more
core  

Sub-50 nm p-channel FinFET

, 2001
High-performance PMOSFETs with sub-50-nm gate-length are reported. A self-aligned double-gate MOSFET structure (FinFET) is used to suppress the short-channel effects.
Kedzierski, J, Anderson, E, Asano, K, Subramanian, V, Huang, XJ, Hu, CM, Hisamoto, D, Choi, Yang-Kyu, Kuo, C, Lee, WC, King, TJ, Takeuchi, H, Chang, LL, Bokor, J   +13 more
core   +1 more source

Analysis of high-frequency characteristics of FinFET structures for communication circuits

, 2014
Usporedba FinFET-a s klasičnim i SOI MOSFET-om. Strukture i procesi proizvodnje modernih FinFET-a. Definicija struktura FinFET-a s litografskim dimenzijama manjim od 50 nm.
Prgić, Hrvoje
core  

Introduction de la technologie FinFET 7-nm dans Microwind

, 2017
This paper describes the implementation of a high performance FinFET-based 7-nm CMOS Technology in Microwind. Basic concepts related to the design of FinFET and design for manufacturing are also described.
Sicard, Etienne
core   +1 more source

Next generation bulk finFET devices and their benefits for ESD robustness

, 2009
This paper reports the first ESD results on NMOS and gated diode devices processed in a bulk FinFET technology. A comparison with SOI FinFET performance is carried out, highlighting the role of device geometry and three-dimensional architecture. Moreover,
Linten D., Groeseneken G., Russ C., Meneghesso G., Witters L., Scholz M., Collaert N., Griffoni A., Thijs S., Tremouilles D.   +9 more
core  

Design & Simulation of FINFET - Based Low-Power Logic Circuit For Advanced VLSI Applications

– The continuous scaling of semiconductor technology has significantly improved the performance and integration density of digital integrated circuits.
Dr.Sharanbasappa Shetkar, Dr.Basavalinga Swamy, Prathap K, Prof .Sadhana C, Dr.Vinita Patil   +4 more
core   +1 more source

Introduction de la technologie 10-nm FinFET Dans Microwind

, 2017
This paper describes the implementation of a high performance FinFET-based 10-nm CMOS Technology in the educational tool Microwind. New concepts related to the design of FinFET and design for manufacturing are also described.
Sicard, Etienne
core   +1 more source

Design and temperature assessment of analog/RF and linearity parameters on dual material gate junctionless FinFET at 7 nm technology node for nano scale applications. [PDF]

Sci Rep
Kusuma R.
europepmc   +1 more source