Results 81 to 90 of about 537 (109)
Two-Dimensional Materials, the Ultimate Solution for Future Electronics and Very-Large-Scale Integrated Circuits. [PDF]
Nanomicro LettQin L, Wang L.
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Atomic Force Microscopy (AFM)-Based Metrology for Advanced Etching in Three-Dimensional Integrated Circuits. [PDF]
Micromachines (Basel)Chang J +4 more
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New structure transistors for advanced technology node CMOS ICs. [PDF]
Natl Sci RevZhang Q, Zhang Y, Luo Y, Yin H.
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High Electron Mobility in Ge Films Grown on Si (001) by an 8-Inch Molecular Beam Epitaxy System. [PDF]
Nanomaterials (Basel)Ye G +7 more
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A Review of Tunnel Field-Effect Transistors: Materials, Structures, and Applications. [PDF]
Micromachines (Basel)Chen S, An Y, Wang S, Liu H.
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High-density via RRAM cell with multi-level setting by current compliance circuits. [PDF]
Discov NanoHsieh YC +6 more
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AEU - International Journal of Electronics and Communications, 2020
Abstract This paper investigates the digital performance of novel charge plasma based complementary (CPJL) FinFET inverters in terms of low and high noise margins, logic swing LS, DC power consumption PDC, rise tr and fall tf times, and propagations delay at both 10 and 7 nm technology nodes. In addition, their performance is compared with equivalent
Kallolini Banerjee, Abhijit Biswas
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Abstract This paper investigates the digital performance of novel charge plasma based complementary (CPJL) FinFET inverters in terms of low and high noise margins, logic swing LS, DC power consumption PDC, rise tr and fall tf times, and propagations delay at both 10 and 7 nm technology nodes. In addition, their performance is compared with equivalent
Kallolini Banerjee, Abhijit Biswas
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Effects of Fin Height on Digital Performance of Hybrid p-Si/n-InGaAs C-FinFETs at 25 nm Gate Length
2020We report effects of Fin height on the logic application of hybrid complementary FinFETs (HC-Fins) composed of n-FinFETs and p-FinFETs employing InGaAs and Si channel, respectively, at gate length of 25 nm. Using extensive numerical analysis, we calculate rise time tr and fall time tf of NAND gate based inverter built with HC-Fins.
Kallolini Banerjee, Abhijit Biswas
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