Results 21 to 30 of about 1,057 (152)
Monolithic Integration of ScAlN Modulators on Silicon‐On‐Insulator Platform
Monolithic integration of scandium‐doped aluminum nitride (ScAlN) modulators on a silicon‐on‐insulator platform is reported. A multilayer electrode design enhances RF‐optical field overlap, enabling direct access to the diagonal electro‐optic coefficient and improved modulation efficiency.
Sihao Wang +6 more
wiley +1 more source
Materials used for fabricating sustainable composites. ABSTRACT A composite sample with 18% flax fiber flyash (FF) exhibits increased tensile strength (TS) and greater load‐transfer efficiency of the reinforcement under corrosive conditions.
Sumesh Keerthiveettil Ramakrishnan +2 more
wiley +1 more source
This study investigates the UV‐induced degradation of silicon heterojunction cell precursors by isolating the impact of subcell layers under controlled UVA and UVB irradiation. Front hydrogenated amorphous silicon (i/n)a‐Si:H selective layers are identified as key degradation sites, leading to significant losses in minority carrier lifetime and iVoc ...
Hugo Lajoie +7 more
wiley +1 more source
Mimicking natural tubular structures, metal‐free conjugated hollow fibers are synthesized via one‐pot Chichibabin condensation. Pyridinic networks spontaneously self‐assemble into submicron hollow fibers and entangle into spongy monoliths—without templates, metals, or post‐processing.
Songah Jeong, Hyungwoo Kim
wiley +1 more source
A magnetically controlled chemical–mechanical polishing (MC-CMP) approach for fabricating channel-cut silicon crystal optics for the High Energy Photon Source [PDF]
Zhen Hong +15 more
openalex +1 more source
Virtualization as a New Scaling Law for Semiconductor Devices Beyond Geometric Scaling
AI‐enabled semiconductor scaling law. Virtualization emerges as an AI‐enabled scaling law for semiconductors, where progress depends on replacing physical iteration with credible virtual evidence. Surrogate modeling accelerates design‐space exploration, digital twins virtualize process learning, and defect‐to‐reliability inference advances ...
Zeheng Wang +8 more
wiley +1 more source
Development of modeling to investigate polyurethane pad hardness in chemical mechanical planarization/polishing (CMP) process [PDF]
Le Nam Quoc Huy +2 more
openalex +1 more source
Monolithic 3D Nanoelectrode Arrays on CMOS Circuitry for Scalable, High‐Resolution Neural Recording
A CMOS‐integrated in vitro electrophysiology platform with 26,400 3D nanoelectrodes enables high‐resolution extracellular recordings with enhanced spatial sensitivity. Wafer‐scale, low‐temperature post‐fabrication monolithic integration of nanoelectrodes on foundry‐made CMOS chips preserves circuit functionality and electrical performance.
Aziliz Lecomte +4 more
wiley +1 more source
A DUV‐VCSEL strategy featuring the nanometer‐class control of the cavity length is proposed in the DUV optoelectronic framework based on GaN templates. After the sapphire removal, a self‐terminated etching technology is developed, whereby the cavity length can be accurately determined by epitaxy instead of the fabrication process. As such, a record low
Chen Ji +18 more
wiley +1 more source
Three‐Dimensional Heterogeneous Bonding for High‐Density and Low‐Noise TMR Sensing Arrays
This study demonstrates a three‐dimensional heterogeneous bonding approach to fabricate compact TMR sensing units with double junction numbers and improved magnetic performance. Optimized Au─Au bonding and angled etching improve device integrity, noise characteristics, and magnetoresistance.
Zi'ang Han +3 more
wiley +1 more source

