Expansible Network-on-Chip Architecture
Interconnection has a great importance to provide a high bandwidth communication among parallel systems. On multi-core context, Network-on-Chip is the default intra-chip interconnection choice, providing low contention and high bandwidth between the ...
PIRES, I. L. P. +2 more
doaj +1 more source
An Inter-Processor Communication (IPC) Data Sharing Architecture in Heterogeneous MPSoC for OFDMA
Multiprocessor system-on-chip (MPSoC) promises better data management for parallel processing than conventional SoC. This feature is very suitable for wireless communication systems.
Trio Adiono +5 more
doaj +1 more source
Embedded Real-Time Architecture for Level-Set-Based Active Contours
Methods described by partial differential equations have gained a considerable interest because of undoubtful advantages such as an easy mathematical description of the underlying physics phenomena, subpixel precision, isotropy, or direct extension to ...
Dejnožková Eva +1 more
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Multimedia Terminal System-on-Chip Design and Simulation
This paper proposes a design approach based on integrated architectural and system-on-chip (SoC) simulations. The main idea is to have an efficient framework for the design and the evaluation of multimedia terminals, allowing a fast system simulation ...
Barbieri Ivano +3 more
doaj +1 more source
Optimal memory time Cache partitioning in chip-multiprocessors
Optimal memory time Cache partitioning(OMTP) was proposed.The OMTP can get the average access invalidation overheads of different application and Cache line distributation about Cache hit through the characteristic obtain unit.According to which the OMTP
Hao LI, Lun-guo XIE
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FPGA Implementation of the Frequency Scaling Algorithm for Real-Time SAR Imaging
This paper presents a field-programmable gate array (FPGA)-based hardware accelerator for the frequency scaling algorithm (FSA) targeting real-time onboard synthetic aperture radar (SAR) imaging.
Dongmin Jeong +5 more
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Design Space Exploration of Clustered Sparsely Connected MPSoC Platforms. [PDF]
Frid N, Sruk V, Jakobović D.
europepmc +1 more source
Efficient real-time selective genome sequencing on resource-constrained devices. [PDF]
Shih PJ +3 more
europepmc +1 more source
Bounding the execution time of parallel applications on unrelated multiprocessors. [PDF]
Voudouris P, Stenström P, Pathan R.
europepmc +1 more source
Design of GPU Network-on-Chip for Real-Time Video Super-Resolution Reconstruction. [PDF]
Peng Z, Du J, Qiao Y.
europepmc +1 more source

