Results 71 to 80 of about 441 (179)

Expansible Network-on-Chip Architecture

open access: yesAdvances in Electrical and Computer Engineering, 2018
Interconnection has a great importance to provide a high bandwidth communication among parallel systems. On multi-core context, Network-on-Chip is the default intra-chip interconnection choice, providing low contention and high bandwidth between the ...
PIRES, I. L. P.   +2 more
doaj   +1 more source

An Inter-Processor Communication (IPC) Data Sharing Architecture in Heterogeneous MPSoC for OFDMA

open access: yesJournal of ICT Research and Applications, 2018
Multiprocessor system-on-chip (MPSoC) promises better data management for parallel processing than conventional SoC. This feature is very suitable for wireless communication systems.
Trio Adiono   +5 more
doaj   +1 more source

Embedded Real-Time Architecture for Level-Set-Based Active Contours

open access: yesEURASIP Journal on Advances in Signal Processing, 2005
Methods described by partial differential equations have gained a considerable interest because of undoubtful advantages such as an easy mathematical description of the underlying physics phenomena, subpixel precision, isotropy, or direct extension to ...
Dejnožková Eva   +1 more
doaj   +1 more source

Multimedia Terminal System-on-Chip Design and Simulation

open access: yesEURASIP Journal on Advances in Signal Processing, 2005
This paper proposes a design approach based on integrated architectural and system-on-chip (SoC) simulations. The main idea is to have an efficient framework for the design and the evaluation of multimedia terminals, allowing a fast system simulation ...
Barbieri Ivano   +3 more
doaj   +1 more source

Optimal memory time Cache partitioning in chip-multiprocessors

open access: yesTongxin xuebao, 2012
Optimal memory time Cache partitioning(OMTP) was proposed.The OMTP can get the average access invalidation overheads of different application and Cache line distributation about Cache hit through the characteristic obtain unit.According to which the OMTP
Hao LI, Lun-guo XIE
doaj   +2 more sources

FPGA Implementation of the Frequency Scaling Algorithm for Real-Time SAR Imaging

open access: yesIEEE Access
This paper presents a field-programmable gate array (FPGA)-based hardware accelerator for the frequency scaling algorithm (FSA) targeting real-time onboard synthetic aperture radar (SAR) imaging.
Dongmin Jeong   +5 more
doaj   +1 more source

Efficient real-time selective genome sequencing on resource-constrained devices. [PDF]

open access: yesGigascience, 2022
Shih PJ   +3 more
europepmc   +1 more source

Bounding the execution time of parallel applications on unrelated multiprocessors. [PDF]

open access: yesReal Time Syst (Dordr), 2022
Voudouris P, Stenström P, Pathan R.
europepmc   +1 more source

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