Results 51 to 60 of about 441 (179)

Efanesoctocog Alfa Population Pharmacokinetics and Repeated Time‐To‐Event Analysis of Bleeds in Adults, Adolescents, and Children with Severe Hemophilia A

The Journal of Clinical Pharmacology, Volume 65, Issue 7, Page 860-872, July 2025.
Abstract Efanesoctocog alfa is a first‐in‐class high‐sustained factor VIII (HSF) replacement therapy for treatment of hemophilia A. This article presents population pharmacokinetics (PopPK) of efanesoctocog alfa and repeated time‐to‐event (RTTE) analysis of bleeding episodes in adults/adolescents (≥12 years of age) and children (<12 years).
Nancy Wong, Pratik Bhagunde, Joakim Nyberg, Suresh Katragadda, Marek Demissie, Annemieke Willemze, Craig Benson, Sreeraj Macha   +7 more
wiley   +1 more source

Routing Techniques in Network-On-Chip Based Multiprocessor-System-on-Chip for IOT: A Systematic Review

Iraqi Journal for Computer Science and Mathematics
Routing techniques (RTs) play a critical role in modern computing systems that use network-on-chip (NoC) communication infrastructure within multiprocessor system-on-chip (MPSoC) platforms.
yousif muhsen, Nor Azura Husin, Maslina Binti Zolkepli, Noridayu Manshor, Ahmed Abbas Jasim Al-Hchaimi, A. S. Albahri   +5 more
doaj   +1 more source

Design, Implementation and Validation of a Level 2 Automated Driving Vehicle Reference Architecture

Expert Systems, Volume 42, Issue 6, June 2025.
ABSTRACT Automated vehicles represent a rapidly expanding global market, drawing significant attention from both industry and academia. However, existing solutions often lack transparency, particularly in the disclosure of architectural designs, resulting in fragmented development approaches.
Javier Saez‐Perez, Julio Diez‐Tomillo, David Tena‐Gago, Jose M. Alcaraz‐Calero, Qi Wang   +4 more
wiley   +1 more source

Network Partitioning Domain Knowledge Multiobjective Application Mapping for Large-Scale Network-on-Chip

Applied Computational Intelligence and Soft Computing, 2014
This paper proposes a multiobjective application mapping technique targeted for large-scale network-on-chip (NoC). As the number of intellectual property (IP) cores in multiprocessor system-on-chip (MPSoC) increases, NoC application mapping to find ...
Yin Zhen Tei, Yuan Wen Hau, N. Shaikh-Husin, M. N. Marsono   +3 more
doaj   +1 more source

Dynamic Data Allocation and Task Scheduling on Multiprocessor Systems With NVM-Based SPM

IEEE Access, 2019
Low-power and short-latency memory access is critical to the performance of chip multiprocessor (CMP) system devices, especially to bridge the performance gap between memory and CPU.
Yan Wang, Kenli Li, Keqin Li
doaj   +1 more source

Proximity coherence for chip-multiprocessors

, 2011
Many-core architectures provide an efficient way of harnessing the growing numbers of transistors available in modern fabrication processes; however, the parallel programs run on these platforms are increasingly limited by the energy and latency costs of communication.
openaire   +3 more sources

Accelerated Artificial Bee Colony Optimization for Cost‐Sensitive Neural Networks in Multi‐Class Problems

Expert Systems, Volume 42, Issue 5, May 2025.
ABSTRACT Metaheuristics are advanced problem‐solving techniques that develop efficient algorithms to address complex challenges, while neural networks are algorithms inspired by the structure and function of the human brain. Combining these approaches enables the resolution of complex optimization problems that traditional methods struggle to solve ...
Hilal Hacilar, Bilge Kagan Dedeturk, Mihrimah Ozmen, Mehlika Eraslan Celik, Vehbi Cagri Gungor   +4 more
wiley   +1 more source

Nahalal: Cache Organization for Chip Multiprocessors [PDF]

IEEE Computer Architecture Letters, 2007
This paper addresses cache organization in chip multiprocessors (CMPs). We show that in CMP systems it is valuable to distinguish between shared data, which is accessed by multiple cores, and private data accessed by a single core. We introduce Nahalal, an architecture whose novel floorplan topology partitions cached data according to its usage (shared
Zvika Guz, Idit Keidar, Avinoam Kolodny, Uri C. Weiser   +3 more
openaire   +1 more source

GPU‐Accelerated Lattice Boltzmann Simulations of Power‐Law Non‐Newtonian Fluid Flow in a Diagonally Driven Cavity Using D3Q27 MRT‐LBM

Engineering Reports, Volume 7, Issue 3, March 2025.
The investigation uses the D3Q27 multiple‐relaxation‐time (MRT) lattice Boltzmann method (LBM) to analyze the flow dynamics of power‐law non‐Newtonian fluids in a cubic cavity with a diagonally driven top lid. The simulations are accelerated by utilizing CUDA C+$$ + $$ +$$ + $$ programming on a graphics processing unit (GPU), allowing for efficient ...
Md. Mamun Molla, Amzad Hossain, Md. Mahadul Islam   +2 more
wiley   +1 more source

TMaD: Three‐tier malware detection using multi‐view feature for secure convergence ICT environments

Expert Systems, Volume 42, Issue 2, February 2025.
Abstract As digital transformation accelerates, data generated in a convergence information and communication technology (ICT) environment must be secured. This data includes confidential information such as personal and financial information, so attackers spread malware in convergence ICT environments to steal this information.
Jueun Jeon, Byeonghui Jeong, Seungyeon Baek, Young‐Sik Jeong   +3 more
wiley   +1 more source