Results 61 to 70 of about 407,225 (353)
Low power CMOS iImage sensor for face recognition [PDF]
Imaging system is suitable for different purposes, depending upon their final application. Digital cameras, camcorders, webcams, security cameras or infrared (IR) cameras are well-known imaging systems.
Chan, Kit Heng, Ruslan, Siti Hawa
core
CMOS design of adaptive fuzzy ASICs using mixed-signal circuits [PDF]
Analog circuits are natural candidates to design fuzzy chips with optimum speed/power figures for precision up to about 1%. This paper presents a methodology and circuit blocks to realize fuzzy controllers in the form of analog CMOS chips.
Navas González, Rafael +2 more
core +1 more source
Reconfigurable Three‐Dimensional Superconducting Nanoarchitectures
3D superconducting nanostructures offer new possibilities for emergent physical phenomena. However, fabricating complex geometries remains challenging. Here 3D nanoprinting of complex 3D superconducting nanoarchitectures is established. As well as propagating superconducting vortices in 3D, anisotropic superconducting properties with geometric ...
Elina Zhakina +11 more
wiley +1 more source
Miniaturized 0.13-μm CMOS Front-End Analog for AlN PMUT Arrays
This paper presents an analog front-end transceiver for an ultrasound imaging system based on a high-voltage (HV) transmitter, a low-noise front-end amplifier (RX), and a complementary-metal-oxide-semiconductor, aluminum nitride, piezoelectric ...
Iván Zamora +3 more
doaj +1 more source
Custom transistor layout design techniques for random telegraph signal noise reduction in CMOS image sensors [PDF]
Interface and near oxide traps in small gate area MOS transistors (gate area ,1 mm2) lead to RTS noise which implies the emergence of noisy pixels in CMOS image sensors.
Havard, E. +2 more
core +1 more source
An 820-GHz Down-Converter With Fourth Subharmonic Mixer in 40-nm CMOS Technology [PDF]
Jie Zhou, Xun Luo
openalex +1 more source
An ultra‐robust memristor based on SrTiO3‐CeO2 (S‐C) vertically aligned nanocomposite (VAN) achieving exceptional endurance of 1012 switching cycles via interface engineering. Artificial neural networks (ANNs) integrated with S‐C VAN memristors exhibit high training accuracy across multiple datasets.
Zedong Hu +12 more
wiley +1 more source
On optimal structure and geometry of high-speed integrated photodiodes in a standard CMOS technology [PDF]
Analyses of the influence of different geometries (layouts) and structures of high-speed CMOS photodiodes on their intrinsic (physical) and electrical bandwidths are presented.
Annema, Anne-Johan +2 more
core +2 more sources
The ambipolarity of graphene is exploited to realize a new class of electronic oscillators by integrating a graphene field-effect transistor with Si CMOS logic.
Carlo Gilardi +7 more
openaire +4 more sources
This study investigates electromechanical PUFs that improve on traditional electric PUFs. The electron transport materials are coated randomly through selective ligand exchange. It produces multiple keys and a key with motion dependent on percolation and strain, and approaches almost ideal inter‐ and intra‐hamming distances.
Seungshin Lim +7 more
wiley +1 more source

