Extending locked range of digital phase-locked loop by prediction estimation of states
Tongxin xuebao, 2008 A method to extend locked range of the positive zero crossing detection digital phase-locked loop（ZC-DPLL） was proposed.The nonlinear dynamical model of phase error of a non-controlled DPLL is firstly built,linearation predic-tion estimation of phase ...
ZHAO Yi-bo1 +3 more
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Analog-digital systems of phase-locked loop
Доклады Белорусского государственного университета информатики и радиоэлектроники, 2019 Considered the system digital phase-locked loop with a frequency synthesizer (the reference signal generator), implemented by analog circuits phase-locked.
S. A. Gankevich
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Phase Locked Loop Test Methodology [PDF]
, 2008 Phase locked loops are incorporated into almost every large-scale mixed signal and digital system on chip (SOC). Various types of PLL architectures exist including fully analogue, fully digital, semi-digital, and software based.
Burbidge, Martin, Richardson, Andrew
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Techniques for automatic on chip closed loop transfer function monitoring for embedded charge pump phase locked loops. [PDF]
, 2003 Charge Pump Phase locked loops are used in a variety of applications, including on chip clock synthesis, symbol timing recovery for serial data streams, and generation of frequency agile high frequency carrier signals.
Burbidge, Martin J. +2 more
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Output-jitter performance of second-order digital bang-bang phase-locked loops with nonaccumulative reference clock jitter [PDF]
, 2011 Bang-bang phase-locked loops (BBPLLs) are inherently nonlinear systems due to the binary phase detector (BPD). While they are typically used for clock and data recovery, the ongoing trend toward digital loop implementations has resulted in several ...
Tertinek, Stefan +3 more
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Combined effect of loop delay and reference clock jitter in first-order digital bang-bang phase-locked loops [PDF]
, 2009 Paper presented at the IEEE International Symposium on Circuits and Systems (ISCAS), Taipei, Taiwan, 24-27 May 2009Recently, several digital phase-locked loops (DPLLs) have been demonstrated to achieve the jitter performance of traditional charge-pump ...
Tertinek, Stefan +3 more
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Understanding of the Coherent Demodulation with Phase-Locked Loop
MATEC Web of Conferences, 2018 The phase-locked loop (PLL) technology is a very important technology in the communication field. With the development of electronic technology toward digitalization, the phase-locked processing of signal needs to be realized in digital way.
Zhai Bingcong
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Phase jitter dynamics of first-order digital phase-locked loops with frequency-modulated input [PDF]
, 2008 IEEE International Symposium on Circuits and Systems (ISCAS), Seattle, USA, 18-21 May 2008Inherent to digital phase-locked loops is frequency quantization in the number-controlled oscillator which prevents the loop from locking exactly onto its reference
Tertinek, Stefan +5 more
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Frequency and fundamental signal measurement algorithms for distributed control and protection applications [PDF]
, 2009 Increasing penetration of distributed generation within electricity networks leads to the requirement for cheap, integrated, protection and control systems.
Burt, G.M. +5 more
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A Resolution Control Loop for TDC-Based Phase Detectors in ADPLLs
IEEE Access, 2023 This paper proposes a resolution control loop that runs in background to control the time resolution of a mid-rise Time to Digital Converter (TDC) used as a phase detector in All-Digital Phase Locked Loops (ADPLLs).
Abdelrahman Habib +2 more
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