Results 31 to 40 of about 41,111,468 (182)
A Background Jitter Calibration for ADCs Using TDC Phase Information From ADPLL
IEEE AccessThe phase noise, commonly known as jitter, in Phase-Locked Loops (PLLs) is conventionally perceived as a stochastic process, necessitating a degree of tolerance in downstream circuits such as Analog-to-Digital Converters (ADCs). This paper addresses this
Haoyang Shen +4 more
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Linearized discrete-time model of higher order charge-pump PLLs [PDF]
, 2011 European Conference on Circuit Theory and Design (ECCTD), Linkoping, Sweden, 29-31 August, 2011In this paper, we derive linearized discrete-time models of higher order Charge-Pump Phase-Locked Loops (CPPLLs).
Paul F. Curran +5 more
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Evaluation of Adaptive Loop-Bandwidth Tracking Techniques in GNSS Receivers
Sensors, 2021 Global navigation satellite system (GNSS) receivers use tracking loops to lock onto GNSS signals. Fixed loop settings limit the tracking performance against noise, receiver dynamics, and the current scenario. Adaptive tracking loops adjust these settings
Iñigo Cortés +4 more
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Frequency quantization in first-order digital phase-locked loops with frequency-modulated input [PDF]
, 2007 Presented at the International Workshop on Nonlinear Maps and their Applications (NOMA '07), INSA, Toulouse, December 13-14, 2007Frequency granularity in a digital phase-locked loop arises from quantization in the number-controlled oscillator which ...
Tertinek, Stefan +2 more
core +1 more source
DDS-PLL Phase Shifter Architectures for Phased Arrays: Theory and Techniques
IEEE Access, 2019 The main purpose of this paper is to review the framework behind direct digital synthesizer phase-locked loops (DDS-PLLs), as well as to provide a set of novel techniques that can be used during the development and the deployment of phased arrays based ...
Giulio D'Amato +3 more
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Energies, 2023 This paper studies the stability impact of the alternate voltage controller’s (AVC) low-pass filter (LPF) in a wind turbine’s grid-connected voltage source converter (VSC).
Dimitrios Dimitropoulos +2 more
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Investigation of first-order digital bang-bang phase-locked loops with reference clock jitter [PDF]
, 2008 Paper presented at the Nordic microelectronics conference (NORCHIP), Tallinn, Estonia, 17-18 November, 2008Bang-bang phase-locked loops (BBPLLs) are a class of PLLs with a binary-quantized phase detector (BPD).
Tertinek, Stefan +3 more
core +1 more source
Wave Analogs of Media Based on Phase Locked Loops
Известия высших учебных заведений России: Радиоэлектроника, 2020 Introduction. At present, phase locked loops (PLLs) are widely used: from optimal signal detection and frequency synthesis to automatic control of phase distribution in phased scanned arrays.
L. A. Tsyrulnikova +2 more
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Radiation Tolerant, Low Noise Phase Locked Loops in 65 nm CMOS Technology
EPJ Web of Conferences, 2018 This work presents an introduction to radiation hardened Phase Locked Loops (PLLs) for nuclear and high-energy physics application. An experimental circuit has been fabricated and irradiated with Xrays up to 600 Mrad.
Prinzie Jeffrey +4 more
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Acoustic Backscatter Communication and Power Transfer for Batteryless Wireless Sensors
Sensors, 2023 Sensors for industrial and structural health monitoring are often in shielded and hard-to-reach places. Acoustic wireless power transfer (WPT) and piezoelectric backscatter enable batteryless sensors in such scenarios.
Peter Oppermann, Bernd-Christian Renner
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