Results 21 to 30 of about 41,111,468 (182)

Design of novel hybrid - digitally controlled oscillator for ADPLL

open access: yesMemories - Materials, Devices, Circuits and Systems, 2023
Digitally Controlled Oscillators (DCOs) are an integral part of All Digital Phase Locked Loops (ADPLLs). It is used to generate output frequency corresponding to the applied digital input.
Mohd Ziauddin Jahangir   +1 more
doaj   +1 more source

A Non-Adaptive Single-Phase PLL Based on Discrete Half-Band Filtering to Suppress Severe Frequency Disturbances

open access: yesEnergies, 2020
The interconnection of new generating and storing devices to the power grid imposes the necessity of synchronizing, so the power flow can be manipulated and distributed.
Luis Ibarra   +3 more
doaj   +1 more source

Modelling of 3-Phase p-q Theory-Based Dynamic Load for Real-Time Simulation

open access: yesIEEE Open Access Journal of Power and Energy, 2023
This article proposes a new method of modelling dynamic loads based on instantaneous p-q theory, to be employed in large powers system network simulations in a digital real-time environment.
Karthik Rajashekaraiah   +3 more
doaj   +1 more source

Single-Phase PLL Based on an Adaptive Notch Filter

open access: yesAdvances in Electrical and Electronic Engineering, 2020
Single-Phase Phase-Locked Loops (PLL) have become a crucial component of grid-tied power converters. PLL accuracy and fast response are important for control and protection purposes, especially in the presence of voltage harmonics and frequency ...
Luciano Emilio Belandria, Joan Bergas
doaj   +1 more source

Digital Phase-Locked Loops: Exploring Different Boundaries

open access: yesIEEE Open Journal of the Solid-State Circuits Society
This article examines the research area of digital phase-locked loops (DPLLs), a critical component in modern electronic systems, from wireless communication devices to RADAR systems and digital processors. As the demands for higher integration levels in
Yuncheng Zhang   +2 more
doaj   +1 more source

A Concept of Synchronous ADPLL Networks in Application to Small-Scale Antenna Arrays

open access: yesIEEE Access, 2018
In this paper, we introduce a reconfigurable oscillatory network that generates a synchronous and distributed clocking signal. We propose an accurate model of the network to facilitate the study of its design space and ensure that it operates in its ...
Eugene Koskin   +2 more
doaj   +1 more source

Research on an Active Hydrogen Maser Digital Circuit Control System Based on FPGA

open access: yesSensors, 2023
A hydrogen maser is a high-precision time measurement instrument with high frequency stability and low frequency drift, which is widely used in satellite navigation, ground time keeping, frequency measurement, and other fields.
Wangwang Hu   +6 more
doaj   +1 more source

Statistical analysis of first-order bang-bang phase-locked loops using sign-dependent random-walk theory [PDF]

open access: yes, 2010
Bang-bang phase-locked loops (BBPLLs) are inherently nonlinear due to the hard nonlinearity introduced by the binary phase detector (BPD). This paper provides an exact statistical analysis of the steady-state timing jitter in a first order BBPLL when ...
Gleeson, James   +5 more
core   +1 more source

Binary phase detector gain in bang-bang phase-locked loops with DCO jitter [PDF]

open access: yes, 2010
Bang-bang phase-locked loops (BBPLLs) are hard nonlinear systems due to the nonlinearity introduced by the binary phase detector (BPD). In the presence of jitter, the nonlinear loop is typically analyzed by linearizing the BPD and applying linear ...
Gleeson, James   +5 more
core   +1 more source

Combined effect of loop delay and reference clock jitter in first-order digital bang-bang phase-locked loops [PDF]

open access: yes, 2009
Paper presented at the IEEE International Symposium on Circuits and Systems (ISCAS), Taipei, Taiwan, 24-27 May 2009Recently, several digital phase-locked loops (DPLLs) have been demonstrated to achieve the jitter performance of traditional charge-pump ...
Tertinek, Stefan   +3 more
core   +1 more source

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