Results 61 to 70 of about 106,345 (262)

Tiered-latency DRAM: A low latency and low cost DRAM architecture [PDF]

2013 IEEE 19th International Symposium on High Performance Computer Architecture (HPCA), 2013
The capacity and cost-per-bit of DRAM have historically scaled to satisfy the needs of increasingly large and complex computer systems. However, DRAM latency has remained almost constant, making memory latency the performance bottleneck in today's systems. We observe that the high accesslatency is not intrinsic to DRAM, but a trade-off made to decrease
Donghyuk Lee, Yoongu Kim, Seshadri, Vivek, Liu, Jamie, Lavanya Subramanian, Mutlu, Onur   +5 more
openaire   +1 more source

PULSAR: Simultaneous Many-Row Activation for Reliable and High-Performance Computing in Off-the-Shelf DRAM Chips [PDF]

, 2023
İsmail Emir Yüksel, Yahya Can Tuğrul, F. Nisa Bostancı, A. Giray Yağlıkçı, Ataberk Olgun, Geraldo F. Oliveira, Melina Soysal, Haocong Luo, Juan Gómez-Luna, Mohammad Sadrosadati, Onur Mutlu   +10 more
openalex   +1 more source

Recent Progress and Opportunities in Oxide Semiconductor Devices for In‐Memory and Neuromorphic Computing

Advanced Electronic Materials, EarlyView.
This review surveys oxide‐semiconductor devices for in‐memory and neuromorphic computing, highlighting recent progress and remaining challenges in charge‐trap, ferroelectric, and two‐transistor devices. Oxide semiconductors, featuring ultra‐low leakage, low‐temperature processing, and back‐end‐of‐line compatibility, are explored for analog in‐memory ...
Suwon Seong, Taejun Ha, Sangwook Jung, Wontae Jeong, Yoonyoung Chung   +4 more
wiley   +1 more source

Suppression of Capacitor Leakage Through Thermal Budget Control in DRAM With ZrO₂-Based Dielectrics

IEEE Access
As the DRAM devices continue to scale down, the leakage current of the capacitors is having a significant impact on DRAM operation. We have analyzed the factors that significantly affect the leakage current of DRAM capacitors and improved the leakage ...
Dong-Sik Park, Eun-Ok Lee, Jong-Min Lee, Eunae Cho, Byongdeog Choi   +4 more
doaj   +1 more source

Reconfigurable Combinational Logic Operations Using Triple‐Gated Feedback Field‐Effect Transistors for Logic‐In‐Memory Computing

Advanced Electronic Materials, EarlyView.
In this study, we demonstrated that four distinct combinational logic operations can be reconfigured and executed within a single circuit structure, where each reconfigurable logic‐in‐memory cell dynamically adapts its function. The reconfigurable logic‐in‐memory cell, composed of triple‐gated feedback field‐effect transistors, performs NOT, AND, OR ...
Dongki Kim, Yunwoo Shin, Hyojoo Heo, Kyoungah Cho, Sangsig Kim   +4 more
wiley   +1 more source

SpyHammer: Understanding and Exploiting RowHammer Under Fine-Grained Temperature Variations

IEEE Access
RowHammer is a DRAM vulnerability that can cause bit errors in a victim DRAM row solely by accessing its neighboring DRAM rows at a high-enough rate. Recent studies demonstrate that new DRAM devices are becoming increasingly vulnerable to RowHammer, and ...
Lois Orosa, Ulrich Ruhrmair, A. Giray Yaglikci, Haocong Luo, Ataberk Olgun, Patrick Jattke, Minesh Patel, Jeremie S. Kim, Kaveh Razavi, Onur Mutlu   +9 more
doaj   +1 more source

The Programming Optimization of Capacitorless 1T DRAM Based on the Dual-Gate TFET

Nanoscale Research Letters, 2017
The larger volume of capacitor and higher leakage current of transistor have become the inherent disadvantages for the traditional one transistor (1T)-one capacitor (1C) dynamic random access memory (DRAM).
Wei Li, Hongxia Liu, Shulong Wang, Shupeng Chen, Qianqiong Wang   +4 more
doaj   +1 more source

SuperNeurons: Dynamic GPU Memory Management for Training Deep Neural Networks

, 2018
Going deeper and wider in neural architectures improves the accuracy, while the limited GPU DRAM places an undesired restriction on the network design domain.
Abadi M., Coates A., Collobert R., Dean J., Krizhevsky A., LeCun Y., Szegedy C., Vanhoucke V., Wang L.   +8 more
core   +1 more source

ALD Reactivity‐Driven 2DEG‐Like Interfacial Conduction in Nanolaminate InGaZnO Transistors toward High‐Mobility and Stable Oxide Electronics

Advanced Electronic Materials, EarlyView.
By directly comparing PEALD (P‐IGZO) and thermal‐ALD (T‐IGZO), we show that oxidant reactivity governs atomically ordered InOx–(Ga, Zn)O nanolaminates and a robust 2DEG in amorphous IGZO. PEALD with oxygen plasma forms sharper, chemically distinct interfaces and higher InOx connectivity, achieving ∼90 cm2 V−1 s−1 mobility and superior BTI stability ...
Yoon‐Seo Kim, Daejung Kim, Ki‐Cheol Song, Yeonhee Lee, Hyeong‐Suk Yoo, Young Jae Kim, Jonghoon Kim, Jin‐Seong Park   +7 more
wiley   +1 more source

SwapX: An NVM-Based Hierarchical Swapping Framework

IEEE Access, 2017
Non-volatile memory (NVM) provides persistence with dynamic random access memory (DRAM)-like performance. This paper presents SwapX, an NVM-based hierarchical swapping framework for guest operating systems (OSs) in virtual machines (VMs).
Guoliang Zhu, Kai Lu, Xiaoping Wang, Yiming Zhang, Pengfei Zhang, Sparsh Mittal   +5 more
doaj   +1 more source