Results 171 to 180 of about 6,733 (201)

Electrostatic discharges (ESD), latch-up and pad design constraints

Microelectronic Engineering, 1999
This paper is tailored to beginners in the field of electrostatic discharges. After a brief introduction, the basics of ESD are first reviewed and followed by a description of the standards devoted to the protection of intregrated circuits. Then, the behavior and modeling of elementary devices under ESD are discussed.
Pascal Salome, Corinne Richier
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Electrostatic discharge (ESD) technology benchmarking strategy for evaluating ESD robustness of CMOS technologies

1998 IEEE International Integrated Reliability Workshop Final Report (Cat. No.98TH8363), 2002
This paper describes an ESD technology benchmarking strategy for evaluating the ESD robustness of a semiconductor technology. The strategy consists of a set of CMOS "building block" test structures, a matrix of these test structures, electrical characterization parameters, ESD metrics, a standardized failure criteria, and an extraction and testing ...
S. Voldman, W. Anderson, R. Ashton, M. Chaine, C. Duvvury, T. Maloney, E. Worley   +6 more
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Solving ESD protection latch-up guard ring issues during electrostatic discharge (ESD) events

Proceedings of the 2003 Bipolar/BiCMOS Circuits and Technology Meeting (IEEE Cat No 03CH37440) BIPOL-03, 2003
In this paper, we show how latch-up guard rings, surrounding electrostatic discharge (ESD) protection devices, can reduce the overall performance of the ESD protection network. This issue is addressed by TCAD simulation and experimental results. Design guidelines to cope with this problem are proposed.
null Tremouilles, null Bafleur, null Bertrand, null Nolhier, null Mauran, null Lescouzeres   +5 more
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Electrostatic Discharge (ESD) Susceptibility of Electronic Devices

1983
Abstract : This book contains data on the electrostatic discharge susceptibility (ESD) of electronic devices. Detailed susceptibility data is presented along with the ESD classification in accordance with DOD-HDBK-263 for approximately 700 microcircuits and 500 discrete semiconductor devices.
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Noninvasive optoelectronic system for measurement of electrostatic discharge (ESD)-induced phenomena

IEEE Transactions on Industry Applications, 1997
The design of a high speed optoelectronic system consisting of an electrically floating detector/transmitter module, coupled to a receiver by a fiber optic link, is described. Typical applications of this optical decoupled system, involving electrostatic discharge (ESD), are described.
W.D. Greason, Z. Kucerovsky, S. Bulach, M.W. Flatley   +3 more
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Electrostatic Discharge (ESD) and latchup in advanced semiconductors

2007 7th International Conference on ASIC, 2007
This paper focuses on semiconductor device layout and design, design integration, digital receiver design, off-chip drivers, and ESD power clamps. The paper discussed ESD test models (HBM, MM, and CDM), ESD testing techniques, failure mechanisms, and electro-thermal models (eg. Wunsch-Bell). In addition, the section discussed ESD in diodes, and MOSFETs.
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Electrostatic discharge (ESD) sensitivity of thin-film hybrid passive components

IEEE Transactions on Components, Hybrids, and Manufacturing Technology, 1989
The electrostatic discharge (ESD) sensitivities of thin-film passive components from various hybrid integrated circuits were characterized using two models: the human body model (HBM) and the charge device model (CDM). It was found that thin-film Au conductors made with a minimum linewidth of 60 mu m were insensitive to ESD of 3000 V. Capacitors failed
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Electrostatic discharge (ESD) and technology Scaling: The future of ESD protection in advanced technology

2008 9th International Conference on Solid-State and Integrated-Circuit Technology, 2008
In this paper, electrostatic discharge (ESD) protection in advanced technologies is discussed. The dilemma of ESD protection in advanced technologies and whether we will maintain the need, and desire to provide ESD protection in the future will be reviewed.
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Electrostatic Discharge (ESD) Damage Simulation on RF MMIC Device

International Symposium for Testing and Failure Analysis, 2004
Abstract This paper presents electrostatic discharge (ESD) damage simulation results on good units of the RF monolithic microwave integrated circuit device. Two ESD test models, human body model and machine model, simulators were used to simulate the ESD damage on the good units of the RF MMIC devices in different pin configurations. The
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Electrostatic discharge (ESD) and failure analysis: models, methodologies and mechanisms

Proceedings of the 9th International Symposium on the Physical and Failure Analysis of Integrated Circuits (Cat. No.02TH8614), 2003
Failure analysis is fundamental to the design and development methodology of electrostatic discharge (ESD) devices and ESD robust circuits. The role of failure analysis in the models, methodology, and mechanisms evaluation for improving ESD robustness of semiconductor products and magnetic recording heads are discussed.
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