Graphene-Based ESD Protection for Future ICs [PDF]
On-chip electrostatic discharge (ESD) protection is required for all integrated circuits (ICs). Conventional on-chip ESD protection relies on in-Si PN junction-based device structures for ESD.
Cheng Li +5 more
doaj +4 more sources
Study on ESD Protection Circuit by TCAD Simulation and TLP Experiment [PDF]
The anti-ESD characteristic of the electronic system is paid more and more attention. Moreover, the on-chip electrostatic discharge (ESD) is necessary for integrated circuits to prevent ESD failures.
Fuxing Li +5 more
doaj +2 more sources
A Novel Bidirectional AlGaN/GaN ESD Protection Diode [PDF]
Despite the superior working properties, GaN-based HEMTs and systems are still confronted with the threat of a transient ESD event, especially for the vulnerable gate structure of the p-GaN or MOS HEMTs.
Bin Yao +11 more
doaj +2 more sources
A Novel DTSCR Structure with High Holding Voltage and Enhanced Current Discharge Capability for 28 nm CMOS Technology ESD Protection [PDF]
To cope with the much narrower ESD design window in 28 nm CMOS technology, a novel diode-triggered silicon-controlled rectifier with an extra discharge path (EDP-DTSCR) for ESD protection is proposed in this paper.
Zeen Han +6 more
doaj +2 more sources
Improving ESD Protection Robustness Using SiGe Source/Drain Regions in Tunnel FET [PDF]
Currently, a tunnel field-effect transistor (TFET) is being considered as a suitable electrostatic discharge (ESD) protection device in advanced technology.
Zhaonian Yang +3 more
doaj +2 more sources
The ESD Robustness and Protection Technology of P-GaN HEMT [PDF]
This work first analyzes the failure behaviors of P-GaN HEMTs with different gate structures (Schottky gate vs. Ohmic gate) under both forward and reverse ESD stresses.
Yijun Shi +5 more
doaj +2 more sources
Interposer-Based ESD Protection: A Potential Solution for μ-Packaging Reliability of 3D Chips [PDF]
The ending of Moore’s Law calls for innovations in integrated circuit (IC) technologies and chip designs. Heterogeneous integration (HI) emerges as a pathway towards smart future chips for more Moore time and for beyond-Moore time, featuring systems-on ...
Xunyu Li +5 more
doaj +2 more sources
SCR-Based ESD Protection Using a Penta-Well for 5 V Applications
This paper proposes a new structure of silicon controlled rectifier (SCR)-based ESD protection circuit using a penta-well for ESD protection in 5 V applications. The proposed circuit exhibits higher holding voltage and current-driving capability than low
Bo-Bae Song, Kyoung-Il Do, Yong-Seo Koo
doaj +3 more sources
1 fF ESD protection device for gigahertz high-frequency output ESD protection
A mutual-protection scheme is proposed to achieve an ultra-low capacitance electrostatic discharge (ESD) protection device. The ESD protection device can not only dissipate ESD current, but also can make the vulnerable output transistor have the ESD protection capability.
S -C Huang, Y -H Wu
exaly +2 more sources
Optimization of Tunnel Field-Effect Transistor-Based ESD Protection Network
The tunnel field-effect transistor (TFET) is a potential candidate for replacing the reverse diode and providing a secondary path in a whole-chip electrostatic discharge (ESD) protection network.
Zhihua Zhu +5 more
doaj +1 more source

