Graphene-Based ESD Protection for Future ICs [PDF]
Nanomaterials, 2023 On-chip electrostatic discharge (ESD) protection is required for all integrated circuits (ICs). Conventional on-chip ESD protection relies on in-Si PN junction-based device structures for ESD.
Cheng Li +5 more
doaj +2 more sources
Study on ESD Protection Circuit by TCAD Simulation and TLP Experiment [PDF]
Micromachines, 2023 The anti-ESD characteristic of the electronic system is paid more and more attention. Moreover, the on-chip electrostatic discharge (ESD) is necessary for integrated circuits to prevent ESD failures.
Fuxing Li +5 more
doaj +2 more sources
A Novel Bidirectional AlGaN/GaN ESD Protection Diode [PDF]
Micromachines, 2022 Despite the superior working properties, GaN-based HEMTs and systems are still confronted with the threat of a transient ESD event, especially for the vulnerable gate structure of the p-GaN or MOS HEMTs.
Bin Yao +11 more
doaj +2 more sources
A Novel DTSCR Structure with High Holding Voltage and Enhanced Current Discharge Capability for 28 nm CMOS Technology ESD Protection [PDF]
Micromachines, 2023 To cope with the much narrower ESD design window in 28 nm CMOS technology, a novel diode-triggered silicon-controlled rectifier with an extra discharge path (EDP-DTSCR) for ESD protection is proposed in this paper.
Zeen Han +6 more
doaj +2 more sources
Improving ESD Protection Robustness Using SiGe Source/Drain Regions in Tunnel FET [PDF]
Micromachines, 2018 Currently, a tunnel field-effect transistor (TFET) is being considered as a suitable electrostatic discharge (ESD) protection device in advanced technology.
Zhaonian Yang +3 more
doaj +2 more sources
The ESD Robustness and Protection Technology of P-GaN HEMT [PDF]
MicromachinesThis work first analyzes the failure behaviors of P-GaN HEMTs with different gate structures (Schottky gate vs. Ohmic gate) under both forward and reverse ESD stresses.
Yijun Shi +5 more
doaj +2 more sources
Interposer-Based ESD Protection: A Potential Solution for μ-Packaging Reliability of 3D Chips [PDF]
MicromachinesThe ending of Moore’s Law calls for innovations in integrated circuit (IC) technologies and chip designs. Heterogeneous integration (HI) emerges as a pathway towards smart future chips for more Moore time and for beyond-Moore time, featuring systems-on ...
Xunyu Li +5 more
doaj +2 more sources
Optimization of Tunnel Field-Effect Transistor-Based ESD Protection Network
Crystals, 2021 The tunnel field-effect transistor (TFET) is a potential candidate for replacing the reverse diode and providing a secondary path in a whole-chip electrostatic discharge (ESD) protection network.
Zhihua Zhu +5 more
doaj +1 more source
ESD Design Verification Aided by Mixed-Mode Multiple-Stimuli ESD Simulation
IEEE Journal of the Electron Devices Society, 2021 Electrostatic discharge (ESD) protection is a grand design challenge for complex ICs in advanced technologies. ESD simulation is indispensable to guide ESD protection designs.
Mengfu Di +3 more
doaj +1 more source
Non-Pad-Based in Situ In-Operando CDM ESD Protection Using Internally Distributed Network
IEEE Journal of the Electron Devices Society, 2021 Charged device model (CDM) electrostatic discharge (ESD) protection is an emerging design challenge to ICs at advanced technology nodes. It was recently reported that the traditional pad-based CDM ESD protection methods are fundamentally faulty, which ...
Mengfu Di +3 more
doaj +1 more source