Results 51 to 60 of about 359 (156)

Efficient Hardware Architectures for Error Correcting Codes Applicable to Data Storage

open access: yes, 2021
Error correcting codes (ECCs) are essential to transmission and data storage sys-tems to protect the information from errors introduced by noisy communication channels. There are two main classes of ECCs, namely algebraic and iterative ECCs.
Mondal, Arijit
core  

MP-SoC/NoC Architectures for Error Correction

open access: yes, 2014
Error Correcting Codes (ECCs) have gained noteworthy attention in the last years, mainly due to the development of new standards for high throughput communications, either for wireless or wired terminals. Such high throughput can be achieved by the means
Maurizio Martina   +5 more
core   +1 more source

Adaptable and enhanced error correction codes for efficient error and defect tolerance in memories [PDF]

open access: yes, 2012
textOngoing technology improvements and feature size reduction have led to an increase in manufacturing-induced parameter variations. These variations affect various memory cell circuits, making them unreliable at low voltages.
Datta, Rudrajit
core  

Reliable data recovery from errors due to noisy channel during transmission

open access: yes, 2023
Error correction codes (ECCs) are a fundamental component of modern communication and data storage systems. These codes add redundancy to transmitted or stored data to enable detection and correction of errors that may occur during transmission or ...
Yong, Chung How
core  

Error correction codes for molecular communication systems. [PDF]

open access: yes
Molecular communications (MC) is a bio-inspired paradigm that aims to utilise molecules to exchange information among nano-machines. Given the tiny devices used in a MC system and the feasibility of MC in biological environments, MC can be applied to ...
Lu, Yi
core  

CODING SCRIPT TO AVOID DATA CORRUPTION TO PROTECT MEMORIES [PDF]

open access: yes, 2016
The primary challenge is the fact that individual’s codes should minimize the delay and area penalty. One of the codes which have been considered for memory protection is Reed-Solomon (RS) codes. This limits using ECCs in high-speed recollections. It has
Yadagiri, B.   +1 more
core  

Channel Modeling and Quantization Design for 3D NAND Flash Memory. [PDF]

open access: yesEntropy (Basel), 2023
Wang C   +5 more
europepmc   +1 more source

In-vitro validated methods for encoding digital data in deoxyribonucleic acid (DNA). [PDF]

open access: yesBMC Bioinformatics, 2023
Mortuza GM   +7 more
europepmc   +1 more source

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