Results 51 to 60 of about 197,062 (388)

On the Use of Magnetic RAMs in Field-Programmable Gate Arrays [PDF]

open access: yesInternational Journal of Reconfigurable Computing, 2008
This paper describes the integration of field-induced magnetic switching (FIMS) and thermally assisted switching (TAS) magnetic random access memories in FPGA design. The nonvolatility of the latter is achieved through the use of magnetic tunneling junctions (MTJs) in the MRAM cell.
Guillemenet, Yoann   +3 more
openaire   +4 more sources

Wykorzystanie struktur FPGA do implementacji algorytmów cyfrowego przetwarzania sygnałów [PDF]

open access: yesProblemy Mechatroniki, 2017
W artykule opisano zaprojektowany, wykonany praktycznie oraz przebadany dwukanałowy tor cyfrowego przetwarzania sygnału z układem FPGA (Field-Programmable Gate Array), w którym zaimplementowano algorytmy DSP.
Stanisław GRZYWIŃSKI   +1 more
doaj   +1 more source

A fault-tolerant non-Clifford gate for the surface code in two dimensions [PDF]

open access: yesSci. Adv. 6, eaay4929 (2020), 2019
Fault-tolerant logic gates will consume a large proportion of the resources of a two-dimensional quantum computing architecture. Here we show how to perform a fault-tolerant non-Clifford gate with the surface code; a quantum error-correcting code now under intensive development. This alleviates the need for distillation or higher-dimensional components
arxiv   +1 more source

Reliability Analysis of Field-Programmable Gate-Array-Based Space Computer Architectures

open access: yesJournal of Aerospace Information Systems, 2017
This paper presents an analysis of the radiation tolerance of field-programmable gate-array-based space computers.
J. Hogan, R. Weber, B. Lameres
semanticscholar   +1 more source

Field Programmable Photonic Gate Arrays

open access: yesOptics Express, 2020
The field programmable photonic gate array (FPPGA) is an integrated photonic device/subsystem that operates similarly to a field programmable gate array in electronics. It is a set of programmable photonics analogue blocks (PPABs) and of reconfigurable photonic interconnects (RPIs) implemented over a photonic chip. The PPABs provide the building blocks
José Capmany, Daniel Pérez
openaire   +5 more sources

A high performance cost-effective digital complex correlator for an X-band polarimetry survey [PDF]

open access: yes, 2016
The detailed knowledge of the Milky Way radio emission is important to characterize galactic foregrounds masking extragalactic and cosmological signals.
Barbosa, Domingos   +7 more
core   +2 more sources

Scaling Ion Trap Quantum Computation through Fast Quantum Gates [PDF]

open access: yesPhys. Rev. Lett. 93, 100502 (2004)., 2004
We propose a method to achieve scalable quantum computation based on fast quantum gates on an array of trapped ions, without the requirement of ion shuttling. Conditional quantum gates are obtained for any neighboring ions through spin-dependent acceleration of the ions from periodic photon kicks.
arxiv   +1 more source

Fast universal two-qubit gate for neutral fermionic atoms in optical tweezers [PDF]

open access: yesPhys. Rev. Research 3, 013113 (2021), 2020
An array of ultracold neutral atoms held in optical micro-traps is a promising platform for quantum computation. One of the major bottlenecks of this platform is the weak coupling strength between adjacent atoms, which limits the speed of two-qubit gates.
arxiv   +1 more source

Scalability of spin FPGA: A Reconfigurable Architecture based on spin MOSFET

open access: yes, 2011
Scalability of Field Programmable Gate Array (FPGA) using spin MOSFET (spin FPGA) with magnetocurrent (MC) ratio in the range of 100% to 1000% is discussed for the first time. Area and speed of million-gate spin FPGA are numerically benchmarked with CMOS
Gao Y.   +11 more
core   +1 more source

High throughput and secure advanced encryption standard on field programmable gate array with fine pipelining and enhanced key expansion

open access: yesIET Computers & Digital Techniques, 2015
Aiming at protection of high speed data, field programmable gate array (FPGA)-based advanced encryption standard (AES) design is proposed here. Deep investigation into the logical operations of AES with regard to FPGA architectures leads to two efficient
Qiang Liu, Zhenyu Xu, Ye Yuan
semanticscholar   +1 more source

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