Results 31 to 40 of about 8,685 (118)

An efficient AES implementation using FPGA with enhanced security features

Journal of King Saud University: Engineering Sciences, 2020
Data transferred in an electronic way is vulnerable to attacks. With an aim to protect data for secure communication, a new Hybrid non pipelined Advanced Encryption Standard (AES) algorithm based on traditional AES algorithm with enhanced security ...
Harshali Zodpe, Ashok Sapkal
doaj   +1 more source

Implementation of Reed-Solomon Encoder/Decoder Using Field Programmable Gate Array

Journal of Engineering and Sustainable Development, 2006
In this paper, (15, 11) and (255, 239) Reed-Solomon codes have been designed and Implemented using ALTERA Field Programmable Gate Array (FPGA) device. The design is carried out by writing VHDL modules for different encoder and decoder components.
Hikmat N. Abdullah
doaj  

Experimental Quantification of Hardware Requirements for FPGA-Based Reconfigurable PMUs

IEEE Access, 2019
Phasor Measurement Units (PMUs) are becoming intrinsic components of modern power systems. The synchrophasor estimation algorithms in PMUs pose stringent computational demands, which makes the application of Field Programmable Gate Arrays (FPGA) highly ...
Prottay M. Adhikari, Hossein Hooshyar, Luigi Vanfretti   +2 more
doaj   +1 more source

InSight: An FPGA-Based Neuromorphic Computing System for Deep Neural Networks

Journal of Low Power Electronics and Applications, 2020
Deep neural networks have demonstrated impressive results in various cognitive tasks such as object detection and image classification. This paper describes a neuromorphic computing system that is designed from the ground up for energy-efficient ...
Taeyang Hong, Yongshin Kang, Jaeyong Chung   +2 more
doaj   +1 more source

SOTB Implementation of a Field Programmable Gate Array with Fine-Grained Vt Programmability

Journal of Low Power Electronics and Applications, 2014
Field programmable gate arrays (FPGAs) are one of the most widespread reconfigurable devices in which various functions can be implemented by storing circuit connection information and logic values into configuration memories.
Masakazu Hioki, Chao Ma, Takashi Kawanami, Yasuhiro Ogasahara, Tadashi Nakagawa, Toshihiro Sekigawa, Toshiyuki Tsutsumi, Hanpei Koike   +7 more
doaj   +1 more source

An FPGA-Based Hardware Accelerator for CNNs Using On-Chip Memories Only: Design and Benchmarking with Intel Movidius Neural Compute Stick

International Journal of Reconfigurable Computing, 2019
During the last years, convolutional neural networks have been used for different applications, thanks to their potentiality to carry out tasks by using a reduced number of parameters when compared with other deep learning approaches.
Gianmarco Dinelli, Gabriele Meoni, Emilio Rapuano, Gionata Benelli, Luca Fanucci   +4 more
doaj   +1 more source

An FPGA Architecture for Extracting Real-Time Zernike Coefficients from Measured Phase Gradients

Measurement Science Review, 2015
Zernike modes are commonly used in adaptive optics systems to represent optical wavefronts. However, real-time calculation of Zernike modes is time consuming due to two factors: the large factorial components in the radial polynomials used to define them
Moser Steven, Lee Peter, Podoleanu Adrian   +2 more
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HEART RATE COMPUTATION IMPLEMENTED ON FIELD PROGRAMMABLE GATE ARRAY BOARD

Techne, 2010
Heart rate is the most basic information of heart activities. This paper aims to describe a possible real time system to detect electrocardiogram (ECG) signal, count the R-R interval of the ECG signal, and compute the heart rate.
Ivanna K. Timotius
doaj  

Field‐programmable gate array acceleration of the Tersoff potential in LAMMPS

Engineering Reports
Molecular dynamics simulation is a common method to help humans understand the microscopic world. The traditional general‐purpose high‐performance computing platforms are hindered by low computational and power efficiency, constraining the practical ...
Quan Deng, Qiang Liu
doaj   +1 more source