Low-Resource Time-to-Digital Converters for Field Programmable Gate Arrays: A Review [PDF]
SensorsA fundamental aspect in the evolution of Time-to-Digital Converters (TDCs) implemented within Field-Programmable Gate Arrays (FPGAs), given the increasing demand for detection channels, is the optimization of resource utilization.
Diego Real, David Calvo
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A Self-Timed Multipurpose Delay Sensor for Field Programmable Gate Arrays (FPGAs) [PDF]
Sensors, 2013 This paper presents a novel self-timed multi-purpose sensor especially conceived for Field Programmable Gate Arrays (FPGAs). The aim of the sensor is to measure performance variations during the life-cycle of the device, such as process variability ...
Carlos Gómez Osuna +2 more
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FlexKA: A Flexible Karatsuba Multiplier Hardware Architecture for Variable-Sized Large Integers
IEEE Access, 2023 The Karatsuba algorithm is an effective way to accelerate large integer multiplications through recursive function calls. However, existing hardware implementations of Karatsuba multipliers are limited to fixed operand sizes.
Byeongmin Kang, Hyungmin Cho
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FPGA-Based Controller for a Hybrid Grid-Connected PV/Wind/Battery Power System with AC Load
Energies, 2021 The development and optimization of a hybrid system composed of photovoltaic panels, wind turbines, converters, and batteries connected to the grid, is first presented.
Mohamed Yassine Allani +3 more
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Optical Multi-Context Blind Scrubbing for Field Programmable Gate Arrays
IEEE Photonics Journal, 2020 This paper presents aproposal of a new optical multi-context blind scrubbing that can not only increase the soft-error tolerance of the configuration memory of field programmable gate arrays (FPGAs) but also support high-speed dynamic reconfiguration ...
Yusuke Takaki, Minoru Watanabe
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Rapid prototyping mixed-signal development kit for tactile neural computing
Frontiers in Neuroscience, 2023 Intelligent sensor systems are essential for building modern Internet of Things applications. Embedding intelligence within or near sensors provides a strong case for analog neural computing.
Vasudev S. Mallan +4 more
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Design and Implementation of Asynchronous Processor on FPGA
IEEE Access, 2022 Low-power and fault-tolerant features for microprocessors have been recognized as two of the greatest concerns in applications for edge devices. In this study, we propose asynchronous circuit design techniques for field-programmable gate arrays (FPGA ...
Ziho Shin, Myeong-Hoon Oh
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Fast approximation of the top‐k items in data streams using FPGAs
IET Computers & Digital Techniques, 2023 Two methods are presented for finding the top‐k items in data streams using Field Programmable Gate Arrays (FPGAs). These methods deploy two variants of a novel accelerator architecture capable of extracting an approximate list of the topmost frequently ...
Ali Ebrahim, Jalal Khalifat
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Conducting functional control of field-programmable gate arrays
Вестник Самарского университета: Аэрокосмическая техника, технологии и машиностроение, 2017 Approaches to accomplishing functional control of field-programmable gate arrays (FPGA) are described. The first part of the article describes the existing equipment that allows conducting functional tests of FPGAs.
A. A. Ogurtsov
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Interconnect Solutions for Virtualized Field-Programmable Gate Arrays
IEEE Access, 2018 Contemporary datacenters are enhancing their compute capacity, power efficiency, and processing latency by integrating field-programmable gate arrays (FPGA).
Sadegh Yazdanshenas, Vaughn Betz
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