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Exploring FPGA Logic Block Architecture for Reduced Configuration Memory
Advances in Electrical and Computer Engineering, 2022 The reduction of reconfiguration delay, during the partial dynamic reconfiguration of FPGAs, is important. In this context, the bitstream compression technique is one of the widely used techniques. These compression techniques only minimize the size of
HUSSAIN, F. +3 more
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Post-Measurement Adjustment of the Coincidence Window in Quantum Optics Experiments
IEEE Access, 2021 We report on an electronic coincidence detection circuit for quantum photonic applications implemented on a field-programmable gate array (FPGA), which records each the time separation between detection events coming from single-photon detectors.
Jaime Carine +6 more
doaj +1 more source
Programmable Logic Arrays [PDF]
Wiley. Enc. of. Comp. Sc. & Eng. 4(2008) 2272-2280, 2019 Programmable logic arrays (PLAs) are traditional digital electronic devices. A PLA is a simple programmable logic device (SPLD) used to implement combinational logic circuits. A PLA has a set of programmable AND gates, which link to a set of programmable OR gates to produce an output.
arxiv +1 more source
A Simple Approach of Space-vector Pulse Width Modulation Realization Based on Field Programmable Gate Array [PDF]
, 2010 Employing a field programmable gate array to realize space-vector pulse width modulation is a solution to boost system performance. Although there is much literature in the application of three-phase space-vector pulse width modulation based on field ...
Jidin, Auzani +3 more
core +1 more source
Applied System Innovation, 2023 Modern computers’ network interface cards (NICs) are undergoing changes in order to handle greater data rates and assist with scaling problems caused by general-purpose CPU technology.
Sunkari Pradeep +4 more
doaj +1 more source
A simple laser locking system based on a field-programmable gate array [PDF]
Rev. Sci. Instrum. 87, 073106 (2016), 2016 Frequency stabilization of laser light is crucial in both scientific and industrial applications. Technological developments now allow analog laser stabilization systems to be replaced with digital electronics such as field-programmable gate arrays, which have recently been utilized to develop such locking systems.
arxiv +1 more source
IEEE transactions on industrial electronics (1982. Print), 2013 The Levenberg-Marquardt (LM) algorithm is a nonlinear parameter learning algorithm that converges accurately and quickly. This paper demonstrates for the first time to our knowledge, a real-time implementation of the LM algorithm on field programmable ...
J. Shawash, David R. Selviah
semanticscholar +1 more source
Design and Synthesis of Ultra Low Energy Spin-Memristor Threshold Logic [PDF]
IEEE Transactions on Nanotechnology, Volume:13, Issue: 3, 2014, 2014 A threshold logic gate (TLG) performs weighted sum of multiple inputs and compares the sum with a threshold. We propose Spin-Memeristor Threshold Logic (SMTL) gates, which employ memristive cross-bar array (MCA) to perform current-mode summation of binary inputs, whereas, the low-voltage fast-switching spintronic threshold devices (STD) carry out the ...
arxiv +1 more source
Mokslas: Lietuvos Ateitis, 2019 Metabolic P (MP) systems are a part of the infobiotics research field. The intravenous glucose tolerance test (IVGTT) MP system models glucose-insulin interactions.
Darius Kulakovskis
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A Cost- Effective Design of Reversible Programmable Logic Array [PDF]
Pradeep Singla and Naveen Kr. Malik. Article: A Cost- Effective
Design of Reversible Programmable Logic Array. IJCA 41(15):41-46, March 2012.
Published by Foundation of Computer Science, New York, USA, 2012 In the recent era, Reversible computing is a growing field having applications in nanotechnology, optical information processing, quantum networks etc. In this paper, the authors show the design of a cost effective reversible programmable logic array using VHDL. It is simulated on xilinx ISE 8.2i and results are shown.
arxiv +1 more source