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An Overview of Power Analysis Attacks Against Field Programmable Gate Arrays

open access: yesProceedings of the IEEE, 2006
Since their introduction by Kocher in 1998, power analysis attacks have attracted significant attention within the cryptographic community. While early works in the field mainly threatened the security of smart cards and simple processors, several recent
François-Xavier Standaert   +3 more
semanticscholar   +1 more source

A Software-Defined-Radio Platform for Multiple-Input-Multiple-Output Over-The-Air Measurement [PDF]

open access: yes, 2016
This paper presents a 2 × 2 multiple-inputmultiple-output over-the-air (MIMO OTA) measurement system with user-programmable, reconfigurable and real-time signal processing field-programmable gate arrays (FPGAs)-based software-defined radio (SDR ...
Li, Chong   +3 more
core   +1 more source

A Tag Based Random Order Vector Reduction Circuit

open access: yesIEEE Access, 2020
Vector reduction is a very common operation to reduce a vector into a single scalar value in many scientific and engineering application scenarios. Therefore a fast and efficient vector reduction circuit has great significance to the real-time system ...
Yihua Huang   +4 more
doaj   +1 more source

Self-Reconfigurable Analog Arrays: Off-The Shelf Adaptive Electronics for Space Applications [PDF]

open access: yes, 2007
Development of analog electronic solutions for space avionics is expensive and lengthy. Lack of flexible analog devices, counterparts to digital Field Programmable Gate Arrays (FPGA), prevents analog designers from benefits of rapid prototyping.
Daud, Taher   +4 more
core   +1 more source

Power modeling and characteristics of field programmable gate arrays

open access: yesIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2005
This paper studies power modeling for field programmable gate arrays (FPGAs) and investigates FPGA power characteristics in nanometer technologies. Considering both dynamic and leakage power, a mixed-level power model that combines switch-level models ...
Fei Li   +4 more
semanticscholar   +1 more source

Digital Platform for Wafer-Level MEMS Testing and Characterization Using Electrical Response

open access: yesSensors, 2016
The uniqueness of microelectromechanical system (MEMS) devices, with their multiphysics characteristics, presents some limitations to the borrowed test methods from traditional integrated circuits (IC) manufacturing.
Nuno Brito   +6 more
doaj   +1 more source

A Field Programmable Gate Array Spectrometer for Radio Astronomy [PDF]

open access: yes, 2005
We describe the technological concept and the first-light results of a 1024-channel spectrometer based on field programmable gate array (FPGA) hardware. This spectrometer is the prototype for the seven beam L-band receiver to be installed at the Effelsberg 100-m telescope in autumn 2005.
arxiv   +1 more source

Experiments on autonomous Boolean networks [PDF]

open access: yesChaos 23, 025102 (2013), 2013
We realize autonomous Boolean networks by using logic gates in their autonomous mode-of-operation on a field-programmable gate array. This allows us to implement time-continuous systems with complex dynamical behaviors that can be conveniently interconnected into large-scale networks with flexible topologies that consist of time-delay links and a large
arxiv   +1 more source

A detailed power model for field-programmable gate arrays

open access: yesTODE, 2005
Power has become a critical issue for field-programmable gate array (FPGA) vendors. Understanding the power dissipation within FPGAs is the first step in developing power-efficient architectures and computer-aided design (CAD) tools for FPGAs.
K. K. Poon, S. Wilton, Andy Yan
semanticscholar   +1 more source

Method for Testing Field Programmable Gate Arrays [PDF]

open access: yes, 1999
A method of testing field programmable gate arrays (FPGAs) includes the step of configuring programmable logic blocks of the FPGAs for completing a built-in self-test. Specifically, the FPGA under test may be configured to act as an iterative logic array
Abramovici, Miron, Stroud, Charles E.
core   +4 more sources

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