Blinding HT: Hiding Hardware Trojan signals traced across multiple sequential levels
Modern electronic systems usually use third‐party IP cores to build basic blocks. However, there may be Hardware Trojans (HTs) in IP cores, which will cause critical security problem.
Ying Zhang+4 more
doaj +1 more source
Synthetic cells (SCs) hold great promise for biomedical applications, but manual production limits scalability. This study presents an automated method for large‐scale SC synthesis, integrating robotic liquid handling and machine learning‐driven high‐throughput characterization.
Noga Sharf‐Pauker+7 more
wiley +1 more source
Digital correlators for spread spectrum communications [PDF]
The design and application, in spread spectrum communications, of a digital correlator implemented in a Xilinx Field Programmable Gate Array is presented.
Chadwick, Raymond B.
core +1 more source
Three Realizations and Comparison of Hardware for Piezoresistive Tactile Sensors [PDF]
Tactile sensors are basically arrays of force sensors that are intended to emulate the skin in applications such as assistive robotics. Local electronics are usually implemented to reduce errors and interference caused by long wires.
Castellanos Ramos, Julián+4 more
core +1 more source
Enhanced Terahertz Spectroscopy of a Monolayer Transition Metal Dichalcogenide
An ad‐hoc engineered metallic surface is employed to perform enhanced terahertz spectroscopy of a monolayer transition metal dichalcogenide (TMD). Thanks to a local absorption boost of 104, this technique allows for the extraction of the phonon resonance features and effective permittivity of the 2D material, paving the way for the rational design of ...
Xin Jin+11 more
wiley +1 more source
Area Optimisation for Field-Programmable Gate Arrays in SystemC Hardware Compilation
This paper discusses a pair of synthesis algorithms that optimise a SystemC design to minimise area when targeting FPGAs. Each can significantly improve the synthesis of a high-level language construct, thus allowing a designer to concentrate more on an ...
Johan Ditmar+2 more
doaj +1 more source
Design of FPGA-Based LZ77 Compressor With Runtime Configurable Compression Ratio and Throughput
Data compression reduces the cost of data storage and transmission by decreasing the data size. Previous studies have improved system performance by adaptively choosing the compression ratio (CR) and throughput required for the system by using a trade ...
Seungdo Choi+6 more
doaj +1 more source
IMPLEMENTASI KRIPTOGRAFI AES-128 PADA FIELD PROGRAMMABLE GATE ARRAY (FPGA) (Implementation of AES-128 Cryptography using Field Programmable Gate Arrays (FPGA) [PDF]
ABSTRAKSI: Pada tugas akhir ini diimplementasikan algoritma kriptografi simetris AES (Advanced Encryption Standard) dengan panjang kunci 128 bit dimana proses enkripsi dan dekripsi dilakukan dalam satu chip/core yaitu pada Xilinx XC2S300E PQ208-6.
YUSRAN MASHAMI
core
PROGRAPE-1: A Programmable, Multi-Purpose Computer for Many-Body Simulations [PDF]
We have developed PROGRAPE-1 (PROgrammable GRAPE-1), a programmable multi-purpose computer for many-body simulations. The main difference between PROGRAPE-1 and "traditional" GRAPE systems is that the former uses FPGA (Field Programmable Gate Array) chips as the processing elements, while the latter rely on the hardwired pipeline processor specialized ...
arxiv +1 more source
Design of Field Programmable Gate Array (FPGA) Based Emulators for Motor Control Applications [PDF]
Problem Statement: Field Programmable Gate Array (FPGA) circuits play a significant role in major recent embedded process control designs. However, exploiting these platforms requires deep hardware conception skills and remains an important time consuming stage in a design flow. High Level Synthesis technique avoids this bottleneck and increases design
arxiv +1 more source