Results 21 to 30 of about 11,359 (209)
Micromachines, 2022 In this work, we propose a vertical gate-all-around device architecture (GAA-FinFET) with the aim of simultaneously improving device performance as well as addressing the short channel effect (SCE).
Changwoo Noh +3 more
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Analysis of the Dispersion of Electrical Parameters and Characteristics of FinFET Devices
Journal of Telecommunications and Information Technology, 2023 Extensive numerical simulations of FinFET structures have been carried out using commercial TCAD tools. A series of plasma etching steps has been simulated for different process conditions in order to evaluate the influence of plasma pressure ...
Arkadiusz Malinowski +6 more
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Overview of FinFET device structure development
Dianzi Jishu Yingyong, 2021 With the rapid development of integrated circuit technology, the size of devices continues to shrink. When the channel of the field effect transistor is shortened to 22 nm, the traditional planar field effect transistor no longer meets the development ...
Xiong Qian, Ma Kui, Yang Fashun
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Carrier Mapping in Sub-2nm Node Nanosheet Transistors with Scanning Spreading Resistance Microscopy. [PDF]
Small MethodsWithin this work, advancements in scanning spreading resistance microscopy (SSRM) allow charge carrier mapping within 5.5 nm‐thick nanosheet channels. Devices subjected to rapid thermal annealing at 950°C show ∼ 5 nm enhanced phosphorus diffusion, with profiles in close agreement with semi‐atomistic process simulations.
Pondini A +7 more
europepmc +2 more sources
BSIM-CMG compact model for IC CAD: from FinFET to Gate-All-Around FET Technology
Journal of Microelectronic Manufacturing, 2020 We discuss the BSIM-CMG compact model for SPICE simulations of any common multi-gate (CMG) device. This is an industry standard model which has been used extensively for FinFETs IC design and simulation, and has now been extended to accurately model gate-
Avirup Dasgupta, Chenming Hu
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Micromachines, 2022 In this work, we present a radio frequency (RF) assessment of the nanoscale gallium nitride-silicon-on-insulator fin field-effect transistor (GaN-SOI-FinFET). All the performances of the device were compared with GaN-FinFET and conventional FinFET (Conv.
Ajay Kumar +3 more
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Ultra-low Power FinFET SRAM Cell with Improved Stability Suitable for Low Power Applications [PDF]
International Journal of Electronics and Telecommunications, 2019 In this paper, a new 11T SRAM cell using FinFET technology has been proposed, the basic component of the cell is the 6T SRAM cell with 4 NMOS access transistors to improve the stability and also makes it a dual port memory cell.
Shilpi Birla
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Reliability analysis of a CNT-TF-FinFET for hostile temperature
e-Prime: Advances in Electrical Engineering, Electronics and Energy, 2023 In the concerned research work, an extensive study has been carried out for a newly developed carbon nanotube truncated fin (CNT-TF) FinFET from an analog as well as a linearity point of view.
Praween Kumar Srivastava +2 more
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Impact of self-heating on the statistical variability in bulk and SOI FinFETs [PDF]
, 2015 In this paper for the first time we study the impact of self-heating on the statistical variability of bulk and SOI FinFETs designed to meet the requirements of the 14/16nm technology node.
Alexander, Craig +6 more
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Accurate simulations of the interplay between process and statistical variability for nanoscale FinFET-based SRAM cell stability [PDF]
, 2014 In this paper we illustrate how by using advanced atomistic TCAD tools the interplay between long-range process variation and short-range statistical variability in FinFETs can be accurately modelled and simulated for the purposes of Design-Technology Co-
Asenov, A. +4 more
core +1 more source