Results 41 to 50 of about 7,054 (167)
Nano Convergence, 2020 In this work, the measured electrical characteristics of a fully depleted silicon-on-insulator (FDSOI) device and fin-shaped field-effect transistor (FinFET), whose gate electrode is connected in series to the bottom electrode of a ferroelectric ...
Chankeun Yoon +2 more
doaj +1 more source
Review of Nanosheet Transistors Technology
Tikrit Journal of Engineering Sciences, 2021 Nano-sheet transistor can be defined as a stacked horizontally gate surrounding the channel on all direction. This new structure is earning extremely attention from research to cope the restriction of current Fin Field Effect Transistor (FinFET ...
Firas .. Agha +2 more
doaj +1 more source
Advanced Electronic Materials, EarlyView.This work electrically characterizes sixteen logic gates built from three‐independent‐gate reconfigurable transistors fabricated on full‐scale 300 mm wafers using the industrial 22 nm fully depleted FDSOI process of GlobalFoundries. Static and time‐resolved measurements confirm correct operation, including a 1‐bit adder and reconfigurable AOI/OAI ...
Juan P. Martinez +12 more
wiley +1 more source
Memories - Materials, Devices, Circuits and SystemsIn this work, a high-k In0.53Ga0.47As silicon-on-insulator FinFET (InGaAs–SOI–FinFET) is presented for high-switching and ultra-low power applications at 7 nm gate length.
Priyanka Agrwal, Ajay Kumar
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Advanced Intelligent Discovery, EarlyView.This article outlines how artificial intelligence could reshape the design of next‐generation transistors as traditional scaling reaches its limits. It discusses emerging roles of machine learning across materials selection, device modeling, and fabrication processes, and highlights hierarchical reinforcement learning as a promising framework for ...
Shoubhanik Nath +4 more
wiley +1 more source
Impact of channel line-edge roughness on junctionless FinFET
, 2015 The impact of channel line-edge roughness (LER) on Junctionless FinFET device (JL-FinFET) is investigated by using the 3-D statistical simulation. Then the substantial influence of its narrowest width of the JL-FinFET is defined and presented.
Zhang, Lining +11 more
core +1 more source
Investigation of FinFET as a Temperature Nano-Sensor Based on Channel Semiconductor Type [PDF]
, 2017 This paper represents the temperature effect on FinFET transistor and the possibility of using it as a temperature nano-sensor. The MuGFET simulation tool was used to investigate temperature characteristics of the FinFET.
Hashim, Yasir, Yasir Hashim
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Parametric Analysis of Spiking Neurons in 16 nm Fin Field‐Effect Transistor Technology
Advanced Intelligent Discovery, EarlyView.Energy efficient computing has driven a shift toward brain‐inspired neuromorphic hardware. This study explores the design of three distinct silicon neuron topologies implemented in 16 nm fin field‐Effect transistor technology. While the Axon‐Hillock design achieves gigahertz throughput, its functional fragility persists. The Morris–Lecar model captures
Logan Larsh +3 more
wiley +1 more source
Performance analysis of an efficient montgomery multiplier using 7nm FinFET and junctionless FinFET [PDF]
, 2021 The digital multipliers are the assertive sources of power exhaustion in the modern digital systems. To perform most efficient arithmetic based calculations, Montgomery multiplication can be one of the best alternatives for other conventional methods in ...
Mathan, N. +4 more
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Introducing 5-nm FinFET technology in Microwind
, 2021 This paper describes the implementation of a high performance FinFET-based 5-nm CMOS technology in Microwind. After a general presentation of the electronic market and the roadmap to 1nm technology, design rules and basic metrics for the 5-nm node are ...
Trojman, Lionel, Sicard, Etienne
core +1 more source