Results 41 to 50 of about 451 (114)
Ultra Low Power High Speed Domino Logic Circuit by Using FinFET Technology
Advances in Electrical and Electronic Engineering, 2016 Scaling of the MOSFET face greater challenge by extreme power density due to leakage current in ultra deep sub-micron (UDSM) technology. To overcome from this situation double gate device like FinFET is used which has excellent control over the thin ...
Ajay Kumar Dadoria +3 more
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The Effect of Fin Structure in 5 nm FinFET Technology
Journal of Microelectronic Manufacturing, 2019 In 5 nm technology node, FinFET device performance is sensitive to the dimension of the device structure such as the fin profile. In this work, we simulate the influence of fin height and fin width to an n-type FinFET. We have found that an optimized fin
Enming Shang +4 more
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Design of a Low-Area, Low-Power and High-Speed Comparator in 65 nm FinFET Technology
مهندسی مخابرات جنوبIn the present study, a new low-power and high-speed comparator circuit is designed in 65 nm fin field-effect transistor (FinFET) technology. Moreover, by properly using the capabilities of FinFET technology, the number of transistors is reduced, and ...
Navid Sabzevari +2 more
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Enhanced Circuit Densities in Epitaxially Defined FinFETs (EDFinFETs) over FinFETs
CoRR, 2016 FinFET technology is prone to suffer from Line Edge Roughness (LER) based VT variation with scaling. To address this, we proposed an Epitaxially Defined (ED) FinFET (EDFinFET) as an alternate to FinFET architecture for 10 nm node and beyond. We showed by statistical simulations that EDFinFET reduces LER based VT variability by 90% and overall ...
Sushant Mittal +4 more
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Low Power and Energy‐Efficient Design of MTJ/FinFET Circuits
Engineering ReportsAs technological nodes are scaled down to the nanoscale, power consumption emerges as a critical challenge in complementary metal‐oxide‐semiconductor (CMOS) technology.
Pillem Ramesh, Atul S. M. Tripathi
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Design of 30 nm negative capacitance FinFET using PZT for high-speed processors
Discover MaterialsFinFETs are promising candidates for reduced transistor dimensions, showing a high switching current ratio and better subthreshold performance. It shows better gate control over the channel due to multiple gates, including side and top gates.
Suman Lata Tripathi +2 more
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Engineering and Applied Science Research, 2022 This study presents a novel CMOS self-gated flip flop for low power and area efficient applications. The low power operations are achieved by deactivating the clock signal when not required in the circuit.
Owais Ahmad Shah +2 more
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Asymmetric Drain Extension Dual-kk Trigate Underlap FinFET Based on RF/Analog Circuit
Micromachines, 2017 Among multi-gate field effect transistor (FET) structures, FinFET has better short channel control and ease of manufacturability when compared to other conventional bulk devices.
Ke Han +3 more
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Role of mechanical stress on the electrothermal and OFF state current in scaled FinFET devices
Scientific ReportsThe electrothermal characteristics and leakage current of a tall FinFET device were investigated using the hydrodynamic transport model coupled with a quantum-corrected diffusive transport mechanism-based TCAD simulation.
Shubham, Rajan Kumar Pandey
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High performance and low leakage heterojunction 10 nm PZT NC-FinFET for low power application
Scientific ReportsIncreasing transistor integration density and increased power are the significant challenges for designers at lower transistor technology nodes. However, scaling down the transistor leads to the uneven change in threshold voltage with scaled supply ...
Suman Lata Tripathi +3 more
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