Results 21 to 30 of about 7,054 (167)
A Stepped-Spacer FinFET Design for Enhanced Device Performance in FPGA Applications [PDF]
As transistor dimensions continue to scale below 10 nm, traditional MOSFET architectures face increasing limitations from short-channel effects, gate leakage, and variability.
Meysam Zareiee +2 more
doaj +2 more sources
Design of 30 nm negative capacitance FinFET using PZT for high-speed processors
FinFETs are promising candidates for reduced transistor dimensions, showing a high switching current ratio and better subthreshold performance. It shows better gate control over the channel due to multiple gates, including side and top gates.
Suman Lata Tripathi +2 more
doaj +2 more sources
Оценка влияния параметров структуры FinFET на электрические характеристики средствами TCAD-моделирования [PDF]
Using TCAD modeling, the effect of changing FinFET structure parameters, such as gate stack layer sizes, rib shape, or doping levels, on the electrical characteristics of the device is investigated.С помощью TCAD-моделирования исследовано влияние ...
Д. С. Силкин +5 more
core +1 more source
In this work, we propose a vertical gate-all-around device architecture (GAA-FinFET) with the aim of simultaneously improving device performance as well as addressing the short channel effect (SCE).
Changwoo Noh +3 more
doaj +1 more source
Analysis of the Dispersion of Electrical Parameters and Characteristics of FinFET Devices
Extensive numerical simulations of FinFET structures have been carried out using commercial TCAD tools. A series of plasma etching steps has been simulated for different process conditions in order to evaluate the influence of plasma pressure ...
Arkadiusz Malinowski +6 more
doaj +1 more source
Design Technology Co-Optimization Strategy for Ge Fraction in SiGe Channel of SGOI FinFET
FinFET devices and Silicon-On-Insulator (SOI) devices are two mainstream technical routes after the planar MOSFET reached the limit for scaling. The SOI FinFET devices combine the benefits of FinFET and SOI devices, which can be further boosted by SiGe ...
Shixin Li, Zhenhua Wu
doaj +1 more source
BSIM-CMG compact model for IC CAD: from FinFET to Gate-All-Around FET Technology
We discuss the BSIM-CMG compact model for SPICE simulations of any common multi-gate (CMG) device. This is an industry standard model which has been used extensively for FinFETs IC design and simulation, and has now been extended to accurately model gate-
Avirup Dasgupta, Chenming Hu
doaj +1 more source
Overview of FinFET device structure development
With the rapid development of integrated circuit technology, the size of devices continues to shrink. When the channel of the field effect transistor is shortened to 22 nm, the traditional planar field effect transistor no longer meets the development ...
Xiong Qian, Ma Kui, Yang Fashun
doaj +1 more source
chanjunaa/FinFET-Device-Discovery: First release of FinFET-Device-Discovery
This is the first release of FinFET-Device ...
chanjunaa
core +1 more source
Reliability analysis of a CNT-TF-FinFET for hostile temperature
In the concerned research work, an extensive study has been carried out for a newly developed carbon nanotube truncated fin (CNT-TF) FinFET from an analog as well as a linearity point of view.
Praween Kumar Srivastava +2 more
doaj +1 more source

