Results 11 to 20 of about 7,054 (167)
Comparative Study of Novel u-Shaped SOI FinFET Against Multiple-Fin Bulk/SOI FinFET
IEEE Access, 2023 Superior scalability and better gate-to-channel capacitive coupling can be achieved with adopting gate-all-around (GAA) device architecture. However, compared against FinFET device structure, the GAA device is not very cost-effective.
Myoungsu Son +3 more
doaj +2 more sources
Comparison of bulk FinFET and SOI FinFET
MATEC Web of Conferences, 2018 In this study, we compare the differences and advantages between Bulk FinFET and SOI FinFET. The results are simulated by using the ISE TCAD software.
Chen Ying-Yu, Lin Yu-Hsien
doaj +2 more sources
Comprehensive Investigation of Truncated Fin GaN FinFET for Improved Analog/RF Performance
IEEE Open Journal of NanotechnologyThis work presents an analysis of the performance of Gallium Nitride Truncated Fin FinFETs (GaN-TF-FinFET) and compares them with conventional (C) FinFET, TF-FinFET, and silicon-on-insulator (SOI) TF-FinFET in analog and RF applications by using advanced
Praween Kumar Srivastava +2 more
doaj +2 more sources
Micromachines, 2022 In this work, we present a radio frequency (RF) assessment of the nanoscale gallium nitride-silicon-on-insulator fin field-effect transistor (GaN-SOI-FinFET). All the performances of the device were compared with GaN-FinFET and conventional FinFET (Conv.
Ajay Kumar +3 more
doaj +2 more sources
Nanomaterials, 2023 This research presents the optimization and proposal of P- and N-type 3-stacked Si0.8Ge0.2/Si strained super-lattice FinFETs (SL FinFET) using Low-Pressure Chemical Vapor Deposition (LPCVD) epitaxy.
Fu-Ju Hou, Yung-Chun Wu, Guang-Li Luo
exaly +3 more sources
Silicon-on-Insulator (SOI) Lateral Power-Reduced Surface Field FinFET with High-Power Figure of Merit of 239.3 MW/cm2 [PDF]
MicromachinesIn this study, we propose a lateral power-reduced surface field FinFET (LPR-FinFET) to achieve high breakdown voltage and low on-resistance. We investigate the electric field distribution within the reduced surface field (RESURF) structure under reverse ...
Chang Woo Song +4 more
doaj +2 more sources
Role of mechanical stress on the electrothermal and OFF state current in scaled FinFET devices [PDF]
Scientific ReportsThe electrothermal characteristics and leakage current of a tall FinFET device were investigated using the hydrodynamic transport model coupled with a quantum-corrected diffusive transport mechanism-based TCAD simulation.
Shubham, Rajan Kumar Pandey
doaj +2 more sources
High performance and low leakage heterojunction 10 nm PZT NC-FinFET for low power application [PDF]
Scientific ReportsIncreasing transistor integration density and increased power are the significant challenges for designers at lower transistor technology nodes. However, scaling down the transistor leads to the uneven change in threshold voltage with scaled supply ...
Suman Lata Tripathi +3 more
doaj +2 more sources
Multi-Channel Step FinFET With Spacer Engineering
IEEE AccessMulti-channel FinFET ( $\text{M}_{\textbf {ch}}$ -FinFET) is an emerging device having promising use due to its excellent driving capability. In this paper, we have investigated the significance of multiple channels of FinFET configuration.
Rinku Rani Das, Alex James
doaj +2 more sources
Simulation Study on the Charge Collection Mechanism of FinFET Devices in Single-Event Upset [PDF]
MicromachinesPlanar devices and FinFET devices exhibit significant differences in single-event upset (SEU) response and charge collection. However, the charge collection process during SEU in FinFET devices has not been thoroughly investigated. This article addresses
Hongwei Zhang +6 more
doaj +2 more sources