Results 61 to 70 of about 451 (114)
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Driving capability of SG FinFET and IG FinFET
2015 International Conference on Electrical, Electronics, Signals, Communication and Optimization (EESCO), 2015With the downscaling of the MOSFETs it was not possible to further improve the performance of transistors. FinFET provides the best alternative to the classical planar CMOS technology. Because scaling of CMOS technology leads to saturated performance and increased statistical variability.
Ankja Dubey, Sandeep Singh Gill
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Proceedings of the 2014 on International symposium on physical design, 2014
FinFETs have recently overtaken bulk CMOS transistors as the device of choice for systems-on-chip. This paper provides some background on FinFETs together with their associated manufacturing processes and shows how they influence physical design of standard cells as well as place & route and timing closure for larger blocks.
Robert C. Aitken +6 more
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FinFETs have recently overtaken bulk CMOS transistors as the device of choice for systems-on-chip. This paper provides some background on FinFETs together with their associated manufacturing processes and shows how they influence physical design of standard cells as well as place & route and timing closure for larger blocks.
Robert C. Aitken +6 more
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Numerical simulation on novel FinFETs: asymmetric poly-silicon gate FinFETs and TiN gate FinFETs
Journal of Computational Electronics, 2008We report our numerical study on the device performance of an asymmetric poly-silicon gate FinFET and FinFET with TiN metal gate structure. Our numerical simulation revealed that the asymmetric poly-silicon FinFET structure and TiN gate FinFET structures exhibit superior V T tolerance over the conventional FinFET structure with ...
Han-Geon Kim, Taeyoung Won
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SOI FinFET versus bulk FinFET for 10nm and below
2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2014FinFETs may in principle be built on either bulk [1–3] or SOI [4–5] substrates. In this paper we will review some of the technical issues associated with choice of substrate, directly comparing empirical results on 10nm hardware for which all the other processes are as much the same as possible.
Terence B. Hook +10 more
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Indium Gallium Zinc Oxide FinFET Compared with Silicon FinFET
Journal of Nano Research, 2021Indium gallium zinc oxide fin-field effect transistor (IGZO FinFET) characteristics are investigated and then compared with Zinc oxide fin-field effect transistor (ZnO FinFET) and the Silicon fin-field effect transistor (Si FinFET). This was done using 3D simulation. The threshold voltage for Si, ZnO, and IGZO is 0.75 V, 0.30 V and 0.05 V respectively.
Unopa Matebesi, Nonofo M.J. Ditshego
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Variability Effects in FinFET Transistors and Emerging NC-FinFET
2021 International Conference on IC Design and Technology (ICICDT), 2021Aniket Gupta +3 more
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Investigation of gate oxide short in FinFETs and the test methods for FinFET SRAMs
2013 IEEE 31st VLSI Test Symposium (VTS), 2013When CMOS technologies enter nanometer scale, FinFET has become one of the most promising devices because of the superior electrical characteristics. Nonetheless, due to the scaling of dielectric thickness and the occurring of line-edge roughness, FinFETs may suffer the gate oxide short.
Chen-Wei Lin +2 more
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2012 2nd International Conference on Power, Control and Embedded Systems, 2012
This paper describes the comparative study of different performance parameters for connected DG FINFET, tri-gate FINFET and Independent Gate FINFET. The characteristic parameters, which are drain current, threshold voltage, DIBL and Subthershold slope were evaluated with the help of 3-D TCAD Device simulator on 32nm technology.
S. L. Tripathi +2 more
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This paper describes the comparative study of different performance parameters for connected DG FINFET, tri-gate FINFET and Independent Gate FINFET. The characteristic parameters, which are drain current, threshold voltage, DIBL and Subthershold slope were evaluated with the help of 3-D TCAD Device simulator on 32nm technology.
S. L. Tripathi +2 more
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Device optimization of bulk FinFETs and its comparison with SOI FinFETs
2007 International Workshop on Physics of Semiconductor Devices, 2007FinFETs are the leading candidates for sub 32nm technology node owing to their increased immunity to short channel effects and better scalability. Most of the fabricated FinFETs are on SOI substrates. But fabrication of FinFETs using the bulk CMOS substrates instead of SOI technology is also of interest since it reduces the process costs.
MANOJ, CR +3 more
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2011
FinFET is a promising device structure for scaled CMOS logic/memory applications in 22 nm technology and beyond, thanks to its good short channel effect (SCE) controllability and its small variability. Scaled SRAM and analog circuit are promising candidates for finFET applications and some demonstrations for them are already reported. On the other hand,
N. Horiguchi +19 more
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FinFET is a promising device structure for scaled CMOS logic/memory applications in 22 nm technology and beyond, thanks to its good short channel effect (SCE) controllability and its small variability. Scaled SRAM and analog circuit are promising candidates for finFET applications and some demonstrations for them are already reported. On the other hand,
N. Horiguchi +19 more
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