Results 81 to 90 of about 7,054 (167)
Investigation of a 3 nm Strained Fin Field-Effect Transistor (FinFET) [PDF]
Fin Field-Effect Transistor (FinFET) device is qualified for its low-power operation capability at which the performance can be improved with further scaling.
Tan, Pei Xin
core
Sub-60-mV/decade Negative Capacitance FinFET With Sub-10-nm Hafnium-Based Ferroelectric Capacitor
The negative capacitance (NC) of ferroelectric materials has paved the way for achieving sub-60-mV/decade switching feature in complementary metal-oxide-semiconductor (CMOS) field-effect transistors, by simply inserting a ferroelectric thin layer in the ...
Eunah Ko +4 more
doaj +1 more source
Comparison of Temperature Dependent Carrier Transport in FinFET and Gate-All-Around Nanowire FET
The temperature dependent carrier transport characteristics of n-type gate-all-around nanowire field effect transistors (GAA NW-FET) on bulk silicon are experimentally compared to bulk fin field effect transistors (FinFET) over a wide range of ...
Soohyun Kim +9 more
doaj +1 more source
Physical Modeling and Design of a Nonvolatile Optically Gated High‐Power Diamond Transistor
We introduce a diamond optically gated field effect transistor (DOGFET) which combines high‐speed high‐power operation with exotic single transistor memory. The transistor uses deep level donor type nitrogen traps in type 1b diamond that are optically excited to enable electrostatic gating of the device.
Soumak Nandi +9 more
wiley +1 more source
Transfer characteristics comparison between VPISDC-HSB-BTFET and FinFET.
Transfer characteristics comparison between VPISDC-HSB-BTFET and FinFET.
Meile Wu (15675043) +4 more
core +1 more source
Plasma‐sequence‐engineered ALD (PSE‐ALD), based on sequential NH3 and N2 plasma pulses, enables ultrathin, dense SiNx films. ToF‐MS analysis confirms ligand removal via HCl evolution, while increased film density indicates network densification. The resulting SiNx coating provides robust protection of graphite under H2 plasma exposure.
Hye‐Young Kim +7 more
wiley +1 more source
BDD-Based Topology Optimization for Low-Power DTIG FinFET Circuits
This paper proposed a logic synthesis method based on binary decision diagram (BDD) representation. The proposed method is optimized for dual-threshold independent-gate (DTIG) FinFET circuits.
Haiyan Ni +3 more
doaj +1 more source
Ultra Low Power High Speed Domino Logic Circuit by Using FinFET Technology
Scaling of the MOSFET face greater challenge by extreme power density due to leakage current in ultra deep sub-micron (UDSM) technology. To overcome from this situation double gate device like FinFET is used which has excellent control over the thin ...
Ajay Kumar Dadoria +3 more
doaj +1 more source
Atomic Layer Deposition in Transistors and Monolithic 3D Integration
Transistors are fundamental building blocks of modern electronics. This review summarizes recent progress in atomic layer deposition (ALD) for the synthesis of two‐dimensional (2D) metal oxides and transition‐metal dichalcogenides (TMDCs), with particular emphasis on their enabling role in monolithic three‐dimensional (M3D) integration for next ...
Yue Liu +5 more
wiley +1 more source
The Effect of Fin Structure in 5 nm FinFET Technology
In 5 nm technology node, FinFET device performance is sensitive to the dimension of the device structure such as the fin profile. In this work, we simulate the influence of fin height and fin width to an n-type FinFET. We have found that an optimized fin
Enming Shang +4 more
doaj +1 more source

