Results 51 to 60 of about 11,359 (209)

hp-finite element method for simulating light scattering from complex 3D structures

, 2015
Methods for solving Maxwell's equations are integral part of optical metrology and computational lithography setups. Applications require accurate geometrical resolution, high numerical accuracy and/or low computation times.
Burger, S., Herrmann, S., Pomplun, J., Schmidt, F., Zschiedrich, L.   +4 more
core   +1 more source

Improved effective mobility extraction in MOSFETs [PDF]

, 2009
The standard method of extracting carrier effective mobility from electrical measurements on MOSFETs is reviewed and the assumptions implicit in this method are discussed.
Baccarani, Chen, Chow, D.R. Leadley, E.H.C. Parker, G. Vellianitis, Huang, J.R. Watling, Jungemann, Kilchytska, Koga, Koomen, R.J.P. Lander, Ramos, S.M. Thomas, Schmitz, Schroder, Sodini, T.E. Whall, Takagi, Vasileska, Wang, Zebrev, Zeitzoff   +23 more
core   +1 more source

Dielectric and Gate Metal Engineering for Threshold Voltage Modulation in Enhancement Mode Monolayer MoS2 Field Effect Transistors

Advanced Materials, EarlyView.
Enhancement‐mode monolayer MoS2 FETs with low threshold voltage are essential for low‐power electronics. The threshold voltage can be tuned by the gate metal work function when the semiconductor/dielectric interface is clean. Interfaces between monolayer MoS2 and ZrO2 or hBN allow effective work‐function modulation of the threshold voltage, in contrast
Lixin Liu, Han Yan, Leyi Loh, Kamal Kumar Paul, Soumya Sarkar, Deepnarayan Biswas, Tien‐Lin Lee, Takashi Taniguchi, Kenji Watanabe, Manish Chhowalla, Yan Wang   +10 more
wiley   +1 more source

Performance assessment of InGaAs–SOI–FinFET for enhancing switching capability using high-k dielectric

Memories - Materials, Devices, Circuits and Systems
In this work, a high-k In0.53Ga0.47As silicon-on-insulator FinFET (InGaAs–SOI–FinFET) is presented for high-switching and ultra-low power applications at 7 nm gate length.
Priyanka Agrwal, Ajay Kumar
doaj   +1 more source

Modelling and simulation of advanced semiconductor devices [PDF]

, 2017
This paper presents a modelling and simulation study of advanced semiconductor devices. Different Technology Computer Aided Design approaches and models, used in nowadays research are described here.
Adamu-Lema, Fikru, Al-Ameri, T., Asenov, Asen, Berrada, Salim, Duan, Meng, Georgiev, Vihar, Lee, Jaehyun   +6 more
core   +1 more source

Engineered Strain in 2D Materials by Direct Growth on Deterministically Patterned Grayscale Topographies

Advanced Science, EarlyView.
ABSTRACT Strain is a proven technique for modifying the bandgap and enhancing carrier mobility in 2D materials. Most current strain engineering techniques rely on the post‐growth transfer of these atomically thin materials from growth substrates to target surfaces, limiting their integration into nanoelectronics.
Berke Erbas, Arindam Bala, Hernan Furci, Anushree Dutta, Naresh Kumar, Renato Zenobi, Giovanni Boero, Andras Kis, Juergen Brugger   +8 more
wiley   +1 more source

Study of Warm Electron Injection in Double Gate SONOS by Full Band Monte Carlo Simulation [PDF]

, 2008
In this paper we investigate warm electron injection in a double gate SONOS memory by means of 2D full-band Monte Carlo simulations of the Boltzmann Transport Equation (BTE).
Giusi, G., Iannaccone, G., Mohamed, M., Ravaioli, U.   +3 more
core   +1 more source

A Compendium of Logic Gates Based on Reconfigurable Three‐Independent‐Gate Transistors Realized in FDSOI Hardware

Advanced Electronic Materials, EarlyView.
This work electrically characterizes sixteen logic gates built from three‐independent‐gate reconfigurable transistors fabricated on full‐scale 300 mm wafers using the industrial 22 nm fully depleted FDSOI process of GlobalFoundries. Static and time‐resolved measurements confirm correct operation, including a 1‐bit adder and reconfigurable AOI/OAI ...
Juan P. Martinez, Yuxuan He, Giulio Galderisi, Violetta Sessi, Niladri Bhattacharjee, Peter Baars, Kerstin Poenisch, Annekathrin Zeun, Konstantin Li, Fernando Koch, Binit Syamal, Thomas Mikolajick, Jens Trommer   +12 more
wiley   +1 more source

Improvement of the Drive Current in 5nm Bulk-FinFET Using Process and Device Simulations [PDF]

Journal of Optoelectronical Nanostructures, 2020
: We present the optimization of the manufacturing process of the 5nm bulk-FinFET technology by using the 3D process and device simulations. In this paper, bysimulating the manufacturing processes, we focus on optimizing the manufacturingprocess to ...
Payman Bahrami, Mohammad Reza Shayesteh, Majid Pourahmadi, Hadi Safdarkhani   +3 more
doaj  

Random Discrete Dopant Induced Variability in Negative Capacitance Transistors [PDF]

, 2018
In this work we investigate the impact of random discrete dopants (RDD) induced statistical variability in ferroelectric negative capacitance field effect transistors (NCFETs).
Asenov, Asen, Dutta, Tapas, Georgiev, Vihar   +2 more
core   +1 more source