Results 71 to 80 of about 11,328 (210)
Kolmogorov–Arnold Network for Transistor Compact Modeling
This work introduces Kolmogorov–Arnold network (KAN) for the transistor—an architecture that integrates interpretability with high precision in physics‐based function modeling. The results reveal that despite achieving superior prediction accuracy for critical figures of merit, KAN demonstrates unique inherent challenges for transistor modeling ...
Rodion Novkin, Hussam Amrouch
wiley +1 more source
The major motivation behind transistor scaling is the requirement for high-speed transistors with lower fabrication costs. When the fin thickness or breadth is smaller than 10 nm in a trigate FET, charges travel in a nonconfined fashion, resulting in the
Jami Venkata Suman +2 more
doaj +1 more source
Multi-cell soft errors at the 16-nm FinFET technology node [PDF]
Soft error performance of 16-nm FinFET SRAM designs fabricated using a commercial bulk CMOS process is evaluated using heavy-ions. Results included supply voltage variations show that multi-cell upsets dominate soft-error rates. Dual-port SRAM has higher
Alles, M. L. +6 more
core +2 more sources
Neuromorphic Device Based on Material and Device Innovation toward Multimode and Multifunction
In the era of big data, multimodal and multifunctional neuromorphic devices offer significant opportunities in designing AI hardware. In this work, recent advances about emerging material systems and novel device structures in this field are summarized in detail. Potential applications are reviewed.
Feng Guo +3 more
wiley +1 more source
Investigation of Linearity Performance and Harmonic distortion between Different Advanced CMOS Devices [PDF]
This article introduces a relative study of linearity performance and harmonic distortion among Si junctionless (JL) FinFET, conventional inversion-mode (IM) FinFET, Tunnel FET, and InGaAs MOSFET.
Datta Emona, Basu Arnab, Paul Sayan
doaj +1 more source
Interface Trap Density Metrology of state-of-the-art undoped Si n-FinFETs
The presence of interface states at the MOS interface is a well-known cause of device degradation. This is particularly true for ultra-scaled FinFET geometries where the presence of a few traps can strongly influence device behavior.
Biesemans, Serge +7 more
core +1 more source
Comparison of fin-edge roughness and metal grain work function variability in InGaAs and Si FinFETs [PDF]
The fin-edge roughness (FER) and the TiN metal grain work function (MGW)-induced variability affecting OFF and ON device characteristics are studied and compared between a 10.4 nm gate length In0.53Ga0.47As FinFET and a 10.7 nm gate length Si FinFET.
Aldegunde, Manuel +6 more
core +1 more source
This study presents a numerical quantum transport analysis of graphene nanoribbon field‐effect transistors (GNRFETs) using the non‐equilibrium Green's function (NEGF) formalism. The results show that reducing the channel length and optimizing dielectric materials, such as HfSiO4, significantly enhance ON‐state current and the Ion/Ioff ratio.
Mahamudul Hassan Fuad
wiley +1 more source
FinFET to GAA MBCFET: A Review and Insights
This review article presents a journey from Fin-shaped field effect transistor (FinFET) to gate-all-around multi-bridge channel field effect transistor (GAA MBCFET) technology, unraveling the evolution of semiconductor architectures.
Rinku Rani Das +2 more
doaj +1 more source
As complementary metal-oxide-semiconductor (CMOS) transistors approach the nanometer scale, it has become mandatory to incorporate suitable quantum formalism into electron transport simulators.
Cristina Medina-Bailon +8 more
doaj +1 more source

