Comprehensive Evaluation of OpenCL-based Convolutional Neural Network Accelerators in Xilinx and Altera FPGAs [PDF]
Deep learning has significantly advanced the state of the art in artificial intelligence, gaining wide popularity from both industry and academia.
Kadetotad, Deepak +5 more
core
An Approach to Distance Estimation with Stereo Vision Using Address-Event-Representation [PDF]
Image processing in digital computer systems usually considers the visual information as a sequence of frames. These frames are from cameras that capture reality for a short period of time.
Cerezuela Escudero, Elena +7 more
core +1 more source
Study on design of visual intelligent detection instrument for aviation cable fault
Aviation cable is used to transmit electric energy and signal, and its performance directly affects the safety of aircraft. It is difficult to locate cable faults on aircraft and there is a lack of suitable high-precision detection equipment.
doaj +1 more source
High-resolution wide-band Fast Fourier Transform spectrometers
We describe the performance of our latest generations of sensitive wide-band high-resolution digital Fast Fourier Transform Spectrometer (FFTS). Their design, optimized for a wide range of radio astronomical applications, is presented.
A. Bell +11 more
core +1 more source
A novel normalization algorithm to facilitate pre-assessment of Covid-19 disease by improving accuracy of CNN and its FPGA implementation [PDF]
Sertaç Yaman +2 more
openalex +1 more source
Shouji: A Fast and Efficient Pre-Alignment Filter for Sequence Alignment
Motivation: The ability to generate massive amounts of sequencing data continues to overwhelm the processing capability of existing algorithms and compute infrastructures.
Alkan, Can +4 more
core +2 more sources
The ONSEN Data Reduction System for the Belle II Pixel Detector
We present an FPGA-based online data reduction system for the pixel detector of the future Belle II experiment. The occupancy of the pixel detector is estimated at 3 %.
Geßler, Thomas +6 more
core +1 more source
LDPC Decoder of High Speed Multi-Rate DVB-S2 Based on FPGA
A multi-rate LDPC decoder architecture for DVB-S2 codes based on FPGA is proposed. Through elementary transformation on the parity check matrices of DVB-S2 LDPC codes, a new matrix whose left is a QC sub-matrix and right is Transformation of Staircase ...
doaj +1 more source
STR: a student developed star tracker for the ESA-LED ESMO moon mission [PDF]
In the frame of their engineering degree, ISAE’s students are developing a Star Tracker, with the aim of being the core attitude estimation equipment of the European Moon Student Orbiter.
Lizy-Destrez, Stéphanie, Mimoun, David
core
Method for Computing Dense Optical Flow on FPGA in Real Time
One of the most actual problems in the technical vision systems is the problem of objects detection and selection in the field of the image sensor view.
Alexander V. Bratulin +3 more
doaj +1 more source

