Results 21 to 30 of about 7,660,462 (281)

Hardware Implementation of Deep Network Accelerators Towards Healthcare and Biomedical Applications [PDF]

open access: yesIEEE Transactions on Biomedical Circuits and Systems, 2020
The advent of dedicated Deep Learning (DL) accelerators and neuromorphic processors has brought on new opportunities for applying both Deep and Spiking Neural Network (SNN) algorithms to healthcare and biomedical applications at the edge.
M. Azghadi   +6 more
semanticscholar   +1 more source

Simulation and Arduino Hardware Implementation of DC Motor Control Using Sliding Mode Controller

open access: yesJournal of Robotics and Control (JRC), 2021
The research proposed an alternative controller to control the Direct Current (DC) Motor using a sliding mode controller (SMC) in Matlab Simulink simulation and Arduino hardware implementation.
Alfian Ma’arif, Abdullah Çakan
semanticscholar   +1 more source

Implementation of SM3 algorithm based on SoPC component

open access: yes网络与信息安全学报, 2017
Firstly the realization of SM3 on SoC was given.The structure of the algorithm was analyzed mainly,and the algorithm was realized by the Verilog hardware description language,in order to simulate this algorithm,the Altera simulation software ModelSim was
Meng-li SHAO,Yan-mei LI, Xin-chun YIN
doaj   +3 more sources

Hardware Implementation of Sobel Edge Detection Algorithm [PDF]

open access: yesITM Web of Conferences, 2020
In the fields of image processing, feature detection, the edge detection is an important aspect. For detection of sharp changes in the properties of an image, edges are recognized as important factors which provides more information or data regarding the
Pujare Ankita   +3 more
doaj   +1 more source

Hardware implementation of radial-basis neural networks with Gaussian activation functions on FPGA

open access: yesNeural computing & applications (Print), 2021
This article introduces a method for realizing the Gaussian activation function of radial-basis (RBF) neural networks with their hardware implementation on field-programmable gaits area (FPGAs).
V. Shymkovych, S. Telenyk, Petro Kravets
semanticscholar   +1 more source

Exploring the Limitations of Kolmogorov-Arnold Networks in Classification: Insights to Software Training and Hardware Implementation [PDF]

open access: yes2024 Twelfth International Symposium on Computing and Networking Workshops (CANDARW)
Kolmogorov-Arnold Networks (KANs), a novel type of neural network, have recently gained popularity and attention due to the ability to substitute multi-layer perceptions (MLPs) in artificial intelligence (AI) with higher accuracy and interoperability ...
Van Duy Tran   +7 more
semanticscholar   +1 more source

Hardware Implementation of Neural Self-Interference Cancellation [PDF]

open access: yesIEEE Journal on Emerging and Selected Topics in Circuits and Systems, 2020
In-band full-duplex systems can transmit and receive information simultaneously and on the same frequency band. However, due to the strong self-interference caused by the transmitter to its own receiver, the use of non-linear digital self-interference ...
Yann Kurzo   +3 more
semanticscholar   +1 more source

Optimized Method for Generating and Acquiring GPS Gold Codes

open access: yesInternational Journal of Antennas and Propagation, 2015
We propose a simpler and faster Gold codes generator, which can be efficiently initialized to any desired code, with a minimum delay. Its principle consists of generating only one sequence (code number 1) from which we can produce all the other different
Khaled Rouabah   +4 more
doaj   +1 more source

Hardware Implementation Analysis of Min-Sum Decoders

open access: yesAdvances in Electrical and Electronic Engineering, 2019
The objective of this work is to propose a modified Min-Sum decoding Low Density Parity Check (LDPC) algorithm and perform the hardware implementation analysis of Min-Sum, optimized Min-Sum and modified Min-Sum decoders. The Min-Sum algorithm mainly uses
Rajagopal Anantharaman   +2 more
doaj   +1 more source

An implementation method of missile speed compensation with FPGA on high speed moving platform

open access: yesDianzi Jishu Yingyong, 2019
In view of real-time demand for speed compensation on high speed moving platform, an implementation method of missile speed compensation is proposed.
Hou Kaiqiang   +3 more
doaj   +1 more source

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