Results 241 to 250 of about 706 (250)

An Alternative Hybrid Power-Aware Adder for High-Performance Processors

Journal of Low Power Electronics, 2014
Amirali Baniasadi
exaly  

Design and analysis of a novel low-power and energy-efficient 18T hybrid full adder

Microelectronics Journal, 2018
Mehdi Ayat, Sattar Mirzakuchaki, Majid Amini-Valashani   +2 more
exaly  

Designing Carry Look Ahead Adder to Enrich Performance using One Bit Hybrid Full Adder

2022
exaly  

A Hybrid Approximate Adder for Energy-Efficient Computing

Vishesh Mishra, Cheena Singhal, Sparsh Mittal   +2 more
openaire   +1 more source

Novel hybrid probabilistic–statistical error metrics for approximate adders

Journal of Systems Architecture
Vishesh Mishra, Sparsh Mittal, Urbi Chatterjee   +2 more
openaire   +1 more source

A New Low-Power Hybrid Full Adder Using CCGDI Technique for a Portable MAC Unit

IETE Journal of Research
Biswarup Mukherjee
exaly  

A survey on different modules of low-power high-speed hybrid full adder circuits

2017
Vivek Saraswat, Ankur Kumar, R K Nagaria   +2 more
exaly  

Review of hybrid adders in low power VLSI

Ravina Rai, Pavan Kumar Shukla, Mirtunjay Kumar   +2 more
openaire   +1 more source

Design of energy-efficient and high-speed hybrid decimal adder

The Journal of Supercomputing
Negin Mashayekhi, Ghassem Jaberipur, Mohammad Reza Reshadinezhad, Shekoofeh Moghimi   +3 more
openaire   +1 more source

A high-speed low-latency digit-serial hybrid adder

J Holmberg, M Vesterbacka
exaly