Results 231 to 240 of about 706 (250)

A high-speed and scalable XOR-XNOR-based hybrid full adder design

Computers and Electrical Engineering, 2021
Mainul Hossain, Sharnali Islam, Mehedi Hasan   +2 more
exaly  

Hybrid ADDer: A Viable Solution for Efficient Design of MAC in DNNs

Circuits, Systems, and Signal Processing, 2023
Vasundhara Trivedi, Khushbu Lalwani, Gopal Raut, Avikshit Khomane, Neha Ashar, Santosh Kumar Vishvakarma   +5 more
openaire   +1 more source

High accurate approximate adders using hybrid gates

Integration
Yongqiang Zhang 0006, Jiao Qin, Xin Cheng 0001, Guangjun Xie   +3 more
openaire   +1 more source

Hybrid Full Adder: A Comprehensive Review

2026 9th International Conference on Intelligent Computing and Control Systems (ICICCS)
D. Deepika, C.N. Marimuthu
openaire   +1 more source

A 32-Bit Ripple-Ling Hybrid Carry Adder

IEEE Transactions on Circuits and Systems I: Regular Papers
Ning Shang 0003, Zhou Wang, Ruikang Liu, Yizhou Huang, Yin Zhang, Zhangqing He, Meilin Wan   +6 more
openaire   +1 more source

CL-CPA: A hybrid carry-lookahead/carry-propagate adder for low-power or high-performance operation mode

The Integration VLSI Journal, 2017
Mehdi Kamal, Ali Afzali-Kusha
exaly  

Configurable hybrid adder circuitry

2013
PISTORIUS ERHARD JOACHIM, HUTTON MICHAEL D   +1 more
openaire   +2 more sources

Design of two Low-Power full adder cells using GDI structure and hybrid CMOS logic style

The Integration VLSI Journal, 2014
Keivan Navi
exaly  

Performance Analysis of a Low-Power High-Speed Hybrid 1-bit Full Adder Circuit

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2015
Anup Dandapat, Vinay Kumar, Partha Bhattacharyya   +2 more
exaly  

A fast hybrid carry-lookahead/carry-select adder design

Proceedings of the 11th Great Lakes symposium on VLSI, 2001
Ohsang Kwon, Earl E. Swartzlander Jr., Kevin J. Nowka   +2 more
openaire   +1 more source