Results 31 to 40 of about 6,871,078 (322)
Audio Denoising Coprocessor Based on RISC-V Custom Instruction Set Extension
Acoustics, 2022 As a typical active noise control algorithm, Filtered-x Least Mean Square (FxLMS) is widely used in the field of audio denoising. In this study, an audio denoising coprocessor based on Retrenched Injunction System Computer-V (RISC-V), a custom ...
Jun Yuan +5 more
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Symmetric Cryptography on RISC-V: Performance Evaluation of Standardized Algorithms
Cryptography, 2022 The ever-increasing need for securing computing systems using cryptographic algorithms is spurring interest in the efficient implementation of common algorithms.
Görkem Nişancı +2 more
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A scalable ASIP for BP Polar decoding with multiple code lengths
MATEC Web of Conferences, 2018 In this paper, we propose a flexible scalable BP Polar decoding application-specific instruction set processor (PASIP) that supports multiple code lengths (64 to 4096) and any code rates.
Qiao Wan, Liu Dake
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Instruction set compiled simulation [PDF]
Proceedings of the 40th annual Design Automation Conference, 2003 Instruction set simulators are critical tools for the exploration and validation of new programmable architectures. Due to increasing complexity of the architectures and time-to-market pressure, performance is the most important feature of an instruction-set simulator.
Prabhat Mishra +2 more
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Frontiers in Psychology, 2022 To examine the effects of combined positive verbal encouragement and general technical guidelines on technical and psychophysiological parameters in pupils during a small-sided handball passing game.
Feten Sahli +8 more
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On Architectural Support for Instruction Set Randomization [PDF]
ACM Transactions on Architecture and Code Optimization, 2020 Instruction Set Randomization (ISR) is able to protect against remote code injection attacks by randomizing the instruction set of each process. Thereby, even if an attacker succeeds to inject code, it will fail to execute on the randomized processor.
Christou, George +4 more
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A complete formal semantics of x86-64 user-level instruction set architecture
ACM-SIGPLAN Symposium on Programming Language Design and Implementation, 2019 We present the most complete and thoroughly tested formal semantics of x86-64 to date. Our semantics faithfully formalizes all the non-deprecated, sequential user-level instructions of the x86-64 Haswell instruction set architecture.
Sandeep Dasgupta +4 more
semanticscholar +1 more source
Canadian Journal of Academic Librarianship, 2023 In academic libraries, library instruction often takes the form of one-shot instruction and is not always deeply linked to the broader curricula. This article will argue that if library instruction in an academic setting is to be perceived as beneficial
Roberto Arteaga
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Characteristics of simulations for instructional settings [PDF]
Education and Computing, 1991 This paper discusses the internal characteristics of simulations. The major part of it is concerned with models and their relation with the domain. Some central concepts regarding modelling and simulation are defined. These include concepts regarding:- the structure and characteristics of the model;- the relationship to the system that is being ...
Ton de Jong, Wouter R. van Joolingen
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ConvAix: An Application-Specific Instruction-Set Processor for the Efficient Acceleration of CNNs
IEEE Open Journal of Circuits and Systems, 2021 ConvAix is an application-specific instruction-set processor (ASIP) that enables the energy-efficient processing of convolutional neural networks (CNNs) while retaining substantial flexibility through its instruction-set architecture (ISA) based design ...
Andreas Bytyn +2 more
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