Results 181 to 190 of about 3,871 (202)

Overcome the process limitation by using inverse lithography technology with assist feature

SPIE Proceedings, 2011
Patterning of contact hole using KrF lithography system for the sub 90nm technology node is one of the most challenging tasks. Contact hole pattern can be printed using Off-Axis Illumination(OAI) such as dipole or Quasar or Quadrupole at KrF lithography system.
Yeon-Ah Shim, Sungho Jun, Jaeyoung Choi, Kwangseon Choi, Jae-won Han, Kechang Wang, John McCarthy, Guangming Xiao, Grace Dai, DongHwan Son, Xin Zhou, Tom Cecil, David Kim, Ki-Ho Baik   +13 more
openaire   +1 more source

Inverse Lithography Technology (ILT) Enabled Source Mask Optimization (SMO)

ECS Transactions, 2009
In the first implimentation by Luminescent of ILT-enabled Source-Mask Optimization (SMO), an ILT-optimized mask was generated for each designated illumination condition as the source was swept through various parameter settings in order to find the best combination of source and mask.
Linyong Pang, Guangming Xiao, Vikram Tolani, Peter Hu, Tom Cecil, Thuc Dam, Ki-Ho Baik, Bob Gleason   +7 more
openaire   +1 more source

First 65nm tape-out using inverse lithography technology (ILT)

SPIE Proceedings, 2005
This paper presents SMIC's first 65nm tape out results, in particularly, using ILT. ILT mathematically determines the mask features that produce the desired on-wafer results with best wafer pattern fidelity, largest process window or both. SMIC applied it to its first 65nm tape-out to study ILT performance and benefits for deep sub-wavelength ...
Chi-Yuan Hung, Bin Zhang, Deming Tang, Eric Guo, Linyong Pang, Yong Liu, Andrew Moore, Kechang Wang   +7 more
openaire   +1 more source

Enhancing DRAM printing process window by using inverse lithography technology (ILT)

SPIE Proceedings, 2006
Inverse lithography technology (ILT) was studied during process development for four layers from memory semiconductor designs. This paper describes techniques used in each of the layers. So as to demonstrate this technology in a wide range of semiconductor patterns, we show results from all four layers.
Chih-Wei Chu, Becky Tsao, Karl Chiou, Snow Lee, Jerry Huang, Yong Liu, Timothy Lin, Andrew Moore, Linyong Pang   +8 more
openaire   +1 more source

MTO-like reference mask modeling for advanced inverse lithography technology patterns

SPIE Proceedings, 2017
Advanced Inverse Lithography Technology (ILT) can result in mask post-OPC databases with very small address units, all-angle figures, and very high vertex counts. This creates mask inspection issues for existing mask inspection database rendering. These issues include: large data volumes, low transfer rate, long data preparation times, slow inspection ...
Jongju Park, Jongin Moon, Suein Son, Donghoon Chung, Byung-Gook Kim, Chan-Uk Jeon, Patrick LoPresti, Shan Xue, Sonny Wang, Bill Broadbent, Soonho Kim, Jiuk Hur, Min Choo   +12 more
openaire   +1 more source

Deep Learning-Driven Inverse Lithography Technology for Dmd-Based Maskless Projection Lithography

2023
Jing-Tao Chen, Yuan-yuan Zhao, Xu Guo, Xuan-Ming Duan   +3 more
openaire   +1 more source

An Approach to Extracting SRAF Rules from Inverse Lithography Technology Results

2023 International Workshop on Advanced Patterning Solutions (IWAPS), 2023
Yao Jin, Xuan Li, Zebang Lin, Kun Ren, Dawei Gao, Yongyu Wu, Xuan Zhao, Zhengguo Tian, Xutao Chen, Sihang Zou, Chenwei Sun   +10 more
openaire   +1 more source

Full chip inverse lithography technology mask synthesis for advanced memory manufacturing

DTCO and Computational Patterning II, 2023
Jennefir L. Digaum, Gary Chiang, Lin Wang, Kyle Braam, Dave Gerold, Yongdong Wang, Thuc Dam   +6 more
openaire   +1 more source

Level-set-based inverse lithography for photomask synthesis

Optics Express, 2009
Edmund Y. Lam, Yijiang Shen
exaly  

Robust level-set-based inverse lithography

Optics Express, 2011
Edmund Y. Lam, Yijiang Shen, Ningning Jia   +2 more
exaly