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A Logic Synthesis Methodology for Low-Power Ternary Logic Circuits
IEEE Transactions on Circuits and Systems I: Regular Papers, 2020We propose a logic synthesis methodology with a novel low-power circuit structure for ternary logic. The proposed methodology synthesizes a ternary function as a ternary logic gate using carbon nanotube field-effect transistors (CNTFETs).
Sunmean Kim +4 more
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An Energy-Aware Model for the Logic Synthesis of Quantum-Dot Cellular Automata
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2018Quantum-dot cellular automata (QCA) are an emerging field-coupled nanotechnology with remarkable performance and energy efficiency. In order to enable the exploration of this technology, we propose a model for the logic synthesis of QCA circuits that ...
F. Sill Torres +3 more
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Proceedings of the IEEE, 1990
A survey of logic synthesis techniques for multilevel combinational logic is presented. The goal is to provide more in-depth background and perspective for people interested in pursuing or assessing some of the topics in this emerging field. Introductions, capsule summaries, and, in some cases, detailed analysis of the synthesis methods that have ...
R.K. Brayton +2 more
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A survey of logic synthesis techniques for multilevel combinational logic is presented. The goal is to provide more in-depth background and perspective for people interested in pursuing or assessing some of the topics in this emerging field. Introductions, capsule summaries, and, in some cases, detailed analysis of the synthesis methods that have ...
R.K. Brayton +2 more
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An Experiment in Linguistic Synthesis with a Fuzzy Logic Controller
International Journal of Human Computer Studies, 1999E. Mamdani, S. Assilian
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Bulls-Eye: Active Few-Shot Learning Guided Logic Synthesis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2023Generating suboptimal synthesis transformation sequences (“synthesis recipe”) is an important problem in logic synthesis. Manually crafted synthesis recipes have poor quality.
A. B. Chowdhury +5 more
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RL-Guided Runtime-Constrained Heuristic Exploration for Logic Synthesis
2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 2021Within logic synthesis, most optimization scripts are well-defined heuristics that generalize over a variety of Boolean circuits. These heuristic-based scripts comprise various optimization algorithms which are applied sequentially in a specific order ...
Yasasvi V. Peruvemba +3 more
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A Circuit-Based SAT Solver for Logic Synthesis
2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 2021In recent years SAT solving has been widely used to implement various circuit transformations in logic synthesis. However, off-the-shelf CNF-based SAT solvers often have suboptimal performance on these challenging optimization problems.
He-Teng Zhang, J. Jiang, A. Mishchenko
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EDA for IC Implementation, Circuit Design, and Process Technology, 2006
Sunil Khatri, Narendra Shenoy
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Sunil Khatri, Narendra Shenoy
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ALSRAC: Approximate Logic Synthesis by Resubstitution with Approximate Care Set
Design Automation Conference, 2020Approximate computing is an emerging design technique for error-resilient applications. It improves circuit area, power, and delay at the cost of introducing some errors.
Chang Meng, Weikang Qian, A. Mishchenko
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